Members
Overall Objectives
Research Program
Application Domains
New Software and Platforms
New Results
Bilateral Contracts and Grants with Industry
Partnerships and Cooperations
Dissemination
Bibliography
XML PDF e-pub
PDF e-Pub


Bibliography

Major publications by the team in recent years
[1]
T. Ayav, P. Fradet, A. Girault.
Implementing Fault-Tolerance in Real-Time Programs by Automatic Program Transformations, in: ACM Trans. Embedd. Comput. Syst., July 2008, vol. 7, no 4, pp. 1–43.
[2]
E. Bruneton, T. Coupaye, M. Leclercq, V. Quema, J.-B. Stefani.
The Fractal Component Model and its Support in Java, in: Software - Practice and Experience, 2006, vol. 36, no 11-12.
[3]
S. Djoko Djoko, R. Douence, P. Fradet.
Aspects preserving properties, in: Science of Computer Programming, 2012, vol. 77, no 3, pp. 393-422.
[4]
G. Frehse, A. Hamann, S. Quinton, M. Wöhrle.
Formal Analysis of Timing Effects on Closed-loop Properties of Control Software, in: 35th IEEE Real-Time Systems Symposium 2014 (RTSS), Rome, Italy, December 2014.
https://hal.inria.fr/hal-01097622
[5]
A. Girard, G. Gössler, S. Mouelhi.
Safety Controller Synthesis for Incrementally Stable Switched Systems Using Multiscale Symbolic Models, in: IEEE Transactions on Automatic Control, 2016, vol. 61, no 6, pp. 1537-1549. [ DOI : 10.1109/TAC.2015.2478131 ]
https://hal.archives-ouvertes.fr/hal-01197426
[6]
A. Girault, H. Kalla.
A Novel Bicriteria Scheduling Heuristics Providing a Guaranteed Global System Failure Rate, in: IEEE Trans. Dependable Secure Comput., December 2009, vol. 6, no 4, pp. 241–254, Research report Inria 6319.
http://hal.inria.fr/inria-00177117
[7]
G. Gössler, D. Le Métayer.
A general framework for blaming in component-based systems, in: Science of Computer Programming, 2015, vol. 113, Part 3. [ DOI : 10.1016/j.scico.2015.06.010 ]
https://hal.inria.fr/hal-01211484
[8]
S. Lenglet, A. Schmitt, J.-B. Stefani.
Characterizing Contextual Equivalence in Calculi with Passivation, in: Inf. Comput., 2011, vol. 209, no 11, pp. 1390-1433.
[9]
S. Quinton, M. Hanke, R. Ernst.
Formal analysis of sporadic overload in real-time systems, in: 2012 Design, Automation & Test in Europe Conference & Exhibition, DATE 2012, Dresden, Germany, March, 2012, 2012, pp. 515–520.
http://dx.doi.org/10.1109/DATE.2012.6176523
Publications of the year

Articles in International Peer-Reviewed Journals

[10]
C. Aubert, I. Cristescu.
Contextual equivalences in configuration structures and reversibility, in: Journal of Logical and Algebraic Methods in Programming, 2016.
https://hal.archives-ouvertes.fr/hal-01229408
[11]
A. Bouakaz, P. Fradet, A. Girault.
A Survey of Parametric Dataflow Models of Computation, in: ACM Transactions on Design Automation of Electronic Systems (TODAES), January 2017.
https://hal.inria.fr/hal-01417126
[12]
A. Bouakaz, P. Fradet, A. Girault.
Symbolic Analyses of Dataflow Graphs, in: ACM Transactions on Design Automation of Electronic Systems (TODAES), January 2017.
https://hal.inria.fr/hal-01417146
[13]
A. Girard, G. Gössler, S. Mouelhi.
Safety Controller Synthesis for Incrementally Stable Switched Systems Using Multiscale Symbolic Models, in: IEEE Transactions on Automatic Control, 2016, vol. 61, no 6, pp. 1537-1549. [ DOI : 10.1109/TAC.2015.2478131 ]
https://hal.archives-ouvertes.fr/hal-01197426
[14]
I. Lanese, C. A. Mezzina, J.-B. Stefani.
Reversibility in the higher-order π-calculus, in: Theoretical Computer Science, 2016, vol. 625, pp. 25-84. [ DOI : 10.1016/j.tcs.2016.02.019 ]
https://hal.inria.fr/hal-01303090

Invited Conferences

[15]
E. Yip, A. Girault, P. S. Roop, M. Biglari-Abhari.
The ForeC Synchronous Deterministic Parallel Programming Language for Multicores, in: IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC'16, Lyon, France, IEEE, September 2016.
https://hal.inria.fr/hal-01412102

International Conferences with Proceedings

[16]
A. Bouakaz, P. Fradet, A. Girault.
Symbolic Buffer Sizing for Throughput-Optimal Scheduling of Dataflow Graphs, in: RTAS 2016 - 22nd IEEE Real-Time Embedded Technology & Applications Symposium, Vienne, Austria, April 2016. [ DOI : 10.1109/RTAS.2016.7461360 ]
https://hal.inria.fr/hal-01253168
[17]
A. Bouakaz, P. Fradet, A. Girault.
Symbolic computation of the latency for dataflow graphs, in: Integrating Dataflow, Embedded computing and Architecture (IDEA'2016), Vienne, Austria, April 2016.
https://hal.inria.fr/hal-01417111
[18]
Z. A. H. Hammadeh, E. Rolf, S. Quinton, R. Henia, L. Rioux.
Bounding Deadline Misses in Weakly-Hard Real-Time Systems with Task Dependencies, in: Design, Automation and Test in Europe, Lausanne, Switzerland, March 2017.
https://hal.inria.fr/hal-01426632
[19]
S. Holthusen, S. Quinton, I. Schaefer, J. Schlatow, M. Wegner.
Using Multi-Viewpoint Contracts for Negotiation of Embedded Software Updates, in: Workshop on Pre- and Post-Deployment Verification Techniques, Reykjavik, Iceland, June 2016. [ DOI : 10.4204/EPTCS.208.3 ]
https://hal.inria.fr/hal-01426654
[20]
J. Wang, P. S. Roop, A. Girault.
Energy and timing aware synchronous programming, in: International Conference on Embedded Software, EMSOFT'16, Pittsburgh, United States, ACM, October 2016, 10 p. [ DOI : 10.1145/2968478.2968500 ]
https://hal.inria.fr/hal-01412100

Conferences without Proceedings

[21]
R. Henia, A. Girault, C. Prévot, S. Quinton, L. Rioux.
Quantifying the Flexibility of Real-Time Systems, in: 10th Junior Researcher Workshop on Real-Time Computing, Brest, France, October 2016.
https://hal.inria.fr/hal-01426658

Scientific Books (or Scientific Book chapters)

[22]
G. Gössler, O. Sokolsky (editors)
Proceedings First Workshop on Causal Reasoning for Embedded and safety-critical Systems Technologies, EPTCS, August 2016, vol. 224. [ DOI : 10.4204/EPTCS.224 ]
https://hal.inria.fr/hal-01378792

Books or Proceedings Editing

[23]
V. Nélis, S. Quinton (editors)
Work-in-Progress and Demo Proceedings - 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), April 2016.
https://hal.inria.fr/hal-01305183

Internal Reports

[24]
A. Bouakaz, P. Fradet, A. Girault.
Symbolic Analysis of Dataflow Graphs (Extended Version), Inria - Research Centre Grenoble – Rhône-Alpes, January 2016, no 8742.
https://hal.inria.fr/hal-01166360
[25]
D. Burlyaev, P. Fradet, A. Girault.
A static analysis for the minimization of voters in fault-tolerant circuits, Inria - Research Centre Grenoble – Rhône-Alpes, December 2016, no RR-9004, pp. 1-27.
https://hal.inria.fr/hal-01417164
[26]
L. Shan, S. Graf, S. Quinton.
RTLib: A Library of Timed Automata for Modeling Real-Time Systems, Grenoble 1 UGA - Université Grenoble Alpe ; Inria Grenoble - Rhone-Alpes, November 2016.
https://hal.archives-ouvertes.fr/hal-01393888
[27]
E. Yip, P. S. Roop, A. Girault, M. Biglari-Abhari.
Synchronous Deterministic Parallel Programming for Multicores with ForeC: Programming Language, Semantics, and Code Generation, Inria - Research Centre Grenoble – Rhône-Alpes, August 2016, no RR-8943.
https://hal.inria.fr/hal-01351552
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[29]
G. Leavens, M. Sitaraman (editors)
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[30]
Z. Liu, H. Jifeng (editors)
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[31]
ARTEMIS Joint Undertaking.
ARTEMIS Strategic Research Agenda, 2011.
[32]
S. Andalam, P. Roop, A. Girault.
Predictable Multithreading of Embedded Applications Using PRET-C, in: International Conference on Formal Methods and Models for Codesign, MEMOCODE'10, Grenoble, France, IEEE, July 2010, pp. 159–168.
[33]
I. Assayad, A. Girault, H. Kalla.
Tradeoff Exploration between Reliability, Power Consumption, and Execution Time for Embedded Systems, in: Int. J. Software Tools for Technology Transfer, June 2013, vol. 15, no 3, pp. 229–245.
[34]
P. Axer, R. Ernst, H. Falk, A. Girault, D. Grund, N. Guan, B. Jonsson, P. Marwedel, J. Reineke, C. Rochange, M. Sebatian, R. von Hanxleden, R. Wilhelm, W. Yi.
Building Timing Predictable Embedded Systems, in: ACM Trans. Embedd. Comput. Syst., 2014, To appear.
[35]
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A Survey on Reactive Programming, in: ACM Computing Surveys, 2013, vol. 45, no 4.
[36]
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Rigorous Component-Based System Design Using the BIP Framework, in: IEEE Software, 2011, vol. 28, no 3.
[37]
V. Bebelis, P. Fradet, A. Girault.
A Framework to Schedule Parametric Dataflow Applications on Many-Core Platforms, in: International Conference on Languages, Compilers and Tools for Embedded Systems, LCTES'14, Edinburgh, UK, ACM, June 2014.
[38]
V. Bebelis, P. Fradet, A. Girault, B. Lavigueur.
BPDF: A Statically Analyzable Dataflow Model with Integer and Boolean Parameters, in: International Conference on Embedded Software, EMSOFT'13, Montreal, Canada, ACM, September 2013.
[39]
A. Benveniste, P. Caspi, S. A. Edwards, N. Halbwachs, P. Le Guernic, R. de Simone.
The synchronous languages 12 years later, in: Proceedings of the IEEE, 2003, vol. 91, no 1.
[40]
A. Benveniste, J. Raclet, B. Caillaud, D. Nickovic, R. Passerone, A. Sangiovanni-Vicentelli, T. Henzinger, K. Larsen.
Contracts for the Design of Embedded Systems Part I: Methodology and Use Cases, in: Proceedings of the IEEE, 2012.
[41]
A. Benveniste, J. Raclet, B. Caillaud, D. Nickovic, R. Passerone, A. Sangiovanni-Vicentelli, T. Henzinger, K. Larsen.
Contracts for the Design of Embedded Systems Part II: Theory, in: Proceedings of the IEEE, 2012.
[42]
B. Bonakdarpour, S. S. Kulkarni, F. Abujarad.
Symbolic synthesis of masking fault-tolerant distributed programs, in: Distributed Computing, 2012, vol. 25, no 1.
[43]
S. Borkar.
Designing Reliable Systems from Unreliable Components: The Challenges of Transistor Variability and Degradation, in: IEEE Micro, 2005, vol. 25, no 6.
[44]
R. Bruni, H. C. Melgratti, U. Montanari.
Theoretical foundations for compensations in flow composition languages, in: 32nd ACM Symposium on Principles of Programming Languages (POPL), ACM, 2005.
[45]
S. Burckhardt, D. Leijen.
Semantics of Concurrent Revisions, in: European Symposium on Programming, ESOP'11, Saarbrucken, Germany, LNCS, Springer, March 2011, no 6602, pp. 116–135.
[46]
P. Caspi, M. Pouzet.
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[47]
T. Chothia, D. Duggan.
Abstractions for fault-tolerant global computing, in: Theor. Comput. Sci., 2004, vol. 322, no 3.
[48]
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A Survey of Hard Real-Time Scheduling for Multiprocessor Systems, in: ACM Computing Surveys, 2011, vol. 43, no 4.
[49]
V. De Florio, C. Blondia.
A Survey of Linguistic Structures for Application-Level Fault-Tolerance, in: ACM Computing Surveys, 2008, vol. 40, no 2.
[50]
G. Delaval.
Répartition modulaire de programmes synchrones, INPG, Inria Grenoble Rhône-Alpes, July 2008, PhD thesis.
[51]
G. Delaval, A. Girault, M. Pouzet.
A Type System for the Automatic Distribution of Higher-order Synchronous Dataflow Programs, in: International Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES'08, Tucson (AZ), USA, ACM, June 2008, pp. 101–110.
ftp://ftp.inrialpes.fr/pub/bip/pub/girault/Publications/Lctes08/main.pdf
[52]
S. A. Edwards, E. A. Lee.
The Case for the Precision Timed (PRET) Machine, in: 44th Design Automation Conference (DAC), IEEE, 2007.
[53]
J. Eker, J. W. Janneck, E. A. Lee, J. Liu, X. Liu, J. Ludvig, S. Neuendorffer, S. Sachs, Y. Xiong.
Taming heterogeneity - the Ptolemy approach, in: Proceedings of the IEEE, 2003, vol. 91, no 1.
[54]
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Transactors: a programming model for maintaining globally consistent distributed state in unreliable environments, in: 32nd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL), ACM, 2005.
[55]
P. Fradet, A. Girault, P. Poplavko.
SPDF: A Schedulable Parametric Data-Flow MoC, in: Design Automation and Test in Europe, DATE'12, Dresden, Germany, 2012.
http://hal.inria.fr/hal-00744376
[56]
A. Girard, G. Pappas.
Approximation metrics for discrete and continuous systems, in: IEEE Trans. on Automatic Control, 2007, vol. 52, no 5, pp. 782–798.
[57]
A. Girault, H. Kalla.
A Novel Bicriteria Scheduling Heuristics Providing a Guaranteed Global System Failure Rate, in: IEEE Trans. Dependable Secure Comput., December 2009, vol. 6, no 4, pp. 241–254, Research report Inria 6319.
http://www.computer.org/portal/web/csdl/doi/10.1109/TDSC.2008.50
[58]
D. Gizopoulos, M. Psarakis, S. V. Adve, P. Ramachandran, S. K. S. Hari, D. Sorin, A. Meixner, A. Biswas, X. Vera.
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G. Gössler, J.-B. Stefani.
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[68]
C. M. Kirsch, A. Sokolova.
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E. Yip, P. Roop, M. Biglari-Abhari, A. Girault.
Programming and Timing Analysis of Parallel Programs on Multicores, in: International Conference on Application of Concurrency to System Design, ACSD'13, Barcelona, Spain, IEEE, July 2013, pp. 167–176.
https://hal.inria.fr/hal-00842402