Members
Overall Objectives
Research Program
Application Domains
New Software and Platforms
New Results
Bilateral Contracts and Grants with Industry
Partnerships and Cooperations
Dissemination
Bibliography
XML PDF e-pub
PDF e-Pub


Bibliography

Major publications by the team in recent years
[1]
H. Garavel, F. Lang, R. Mateescu, W. Serwe.
CADP 2011: A Toolbox for the Construction and Analysis of Distributed Processes, in: International Journal on Software Tools for Technology Transfer, 2013, vol. 15, no 2, pp. 89-107. [ DOI : 10.1007/s10009-012-0244-z ]
http://hal.inria.fr/hal-00715056
[2]
F. Lang, R. Mateescu.
Partial Model Checking using Networks of Labelled Transition Systems and Boolean Equation Systems, in: Logical Methods in Computer Science, October 2013, vol. 9, no 4, pp. 1–32.
http://hal.inria.fr/hal-00872181/en
[3]
R. Mateescu, P. Poizat, G. Salaün.
Adaptation of Service Protocols using Process Algebra and On-the-Fly Reduction Techniques, in: IEEE Transactions on Software Engineering, 2012. [ DOI : 10.1109/TSE.2011.62 ]
http://hal.inria.fr/hal-00717252
[4]
R. Mateescu, W. Serwe.
Model Checking and Performance Evaluation with CADP Illustrated on Shared-Memory Mutual Exclusion Protocols, in: Science of Computer Programming, February 2012. [ DOI : 10.1016/j.scico.2012.01.003 ]
http://hal.inria.fr/hal-00671321
[5]
R. Mateescu, A. Wijs.
Sequential and Distributed On-the-Fly Computation of Weak Tau-Confluence, in: Science of Computer Programming, 2012, vol. 77, no 10–11, pp. 1075–1094.
http://hal.inria.fr/hal-00676451/en
[6]
R. Mateescu, A. Wijs.
Property-Dependent Reductions Adequate with Divergence-Sensitive Branching Bisimilarity, in: Science of Computer Programming, December 2014, vol. 96, no 3, pp. 354–376.
[7]
G. Salaün, T. Bultan, N. Roohi.
Realizability of Choreographies using Process Algebra Encodings, in: IEEE Transactions on Services Computing, August 2012, vol. 5, no 3, pp. 290-304.
http://hal.inria.fr/hal-00726448
Publications of the year

Articles in International Peer-Reviewed Journals

[8]
R. Abid, G. Salaün, N. De Palma.
Formal Design of Dynamic Reconfiguration Protocol for Cloud Applications, in: Science of Computer Programming, 2016, vol. 117, pp. 1-16. [ DOI : 10.1016/j.scico.2015.12.001 ]
https://hal.inria.fr/hal-01246152
[9]
G. Barbon, M. Margolis, F. Palumbo, F. Raimondi, N. Weldin.
Taking Arduino to the Internet of Things: the ASIP programming model, in: Computer Communications, 2016, vol. 00, pp. 1 - 15. [ DOI : 10.1016/j.comcom.2016.03.016 ]
https://hal.inria.fr/hal-01416490
[10]
F. Durán, G. Salaün.
Robust and reliable reconfiguration of cloud applications, in: Journal of Systems and Software, 2016, vol. 122, pp. 524-537. [ DOI : 10.1016/j.jss.2015.09.020 ]
https://hal.inria.fr/hal-01245555
[11]
X. Etchevers, G. Salaün, F. Boyer, T. Coupaye, N. De Palma.
Reliable Self-deployment of Distributed Cloud Applications, in: Software: Practice and Experience, 2017, vol. 47, no 1, pp. 3-20. [ DOI : 10.1002/spe.2400 ]
https://hal.inria.fr/hal-01290465
[12]
H. Evrard, F. Lang.
Automatic Distributed Code Generation from Formal Models of Asynchronous Processes Interacting by Multiway Rendezvous, in: Journal of Logical and Algebraic Methods in Programming, September 2016.
https://hal.inria.fr/hal-01412911
[13]
M. Güdemann, P. Poizat, G. Salaün, L. Ye.
VerChor: A Framework for the Design and Verification of Choreographies, in: IEEE Transactions on Services Computing, July 2016, vol. 9, no 4, pp. 647-660. [ DOI : 10.1109/TSC.2015.2413401 ]
https://hal.archives-ouvertes.fr/hal-01198918
[14]
F. Jebali, F. Lang, R. Mateescu.
Formal Modelling and Verification of GALS Systems Using GRL and CADP, in: Formal Aspects of Computing, April 2016, vol. 28, no 5, pp. 767–804. [ DOI : 10.1007/s00165-016-0373-3 ]
https://hal.inria.fr/hal-01290449
[15]
F. Kordon, H. Garavel, L. M. Hillah, E. Paviot-Adet, L. Jezequel, C. Rodríguez, F. Hulin-Hubard.
MCC’2015 – The Fifth Model Checking Contest, in: Transactions on Petri Nets and Other Models of Concurrency, 2016, vol. 9930, pp. 262-273. [ DOI : 10.1007/978-3-662-53401-4_12 ]
https://hal.inria.fr/hal-01361274
[16]
D. Vekris, F. Lang, C. Dima, R. Mateescu.
Verification of EB3 specifications using CADP , in: Formal Aspects of Computing, March 2016, vol. 28, no 1, pp. 145-178. [ DOI : 10.1007/s00165-016-0362-6 ]
https://hal.inria.fr/hal-01290460
[17]
Z. Zhang, W. Serwe, J. Wu, T. Yoneda, H. Zheng, C. Myers.
An improved fault-tolerant routing algorithm for a Network-on-Chip derived with formal analysis, in: Science of Computer Programming, 2016. [ DOI : 10.1016/j.scico.2016.01.002 ]
https://hal.inria.fr/hal-01261234

International Conferences with Proceedings

[18]
L. Akroun, G. Salaün, L. Ye.
Automated Analysis of Asynchronously Communicating Systems, in: 23rd International SPIN symposium on Model Checking of Software, Eindhoven, Netherlands, SPIN'2016, Springer Verlag, April 2016. [ DOI : 10.1007/978-3-319-32582-8_1 ]
https://hal.inria.fr/hal-01280164
[19]
G. Barbon, A. Cortesi, P. Ferrara, E. Steffinlongo.
DAPA: Degradation-Aware Privacy Analysis of Android Apps, in: STM 2016 - 12th International Workshop on Security and Trust Management, Heraklion, Greece, September 2016, pp. 32 - 46. [ DOI : 10.1007/978-3-319-46598-2_3 ]
https://hal.inria.fr/hal-01416504
[20]
C. Canal, G. Salaün.
Stability-Based Adaptation of Asynchronously Communicating Software, in: 14th International Conference on Software Engineering and Formal Methods, Vienne, Austria, July 2016. [ DOI : 10.1007/978-3-319-41591-8_22 ]
https://hal.inria.fr/hal-01359044
[21]
H. Evrard.
DLC: Compiling a Concurrent System Formal Specification to a Distributed Implementation, in: TACAS'2016, Eindhoven, Netherlands, 22nd International Conference on Tools and Algorithms for the Construction and Analysis of Systems TACAS'2016, Springer-Verlag, April 2016. [ DOI : 10.1007/978-3-662-49674-9_34 ]
https://hal.inria.fr/hal-01250925
[22]
R. Mateescu, J. I. Requeno.
On-the-Fly Model Checking for Extended Action-Based Probabilistic Operators, in: 23rd International SPIN symposium on Model Checking of Software, Eindhoven, Netherlands, S. Verlag (editor), SPIN'2016, April 2016. [ DOI : 10.1007/978-3-319-32582-8_13 ]
https://hal.inria.fr/hal-01280129

Conferences without Proceedings

[23]
P. Poizat, G. Salaün, A. Krishna.
Checking Business Process Evolution, in: 13th International Conference on Formal Aspects of Component Software (FACS), Besançon, France, October 2016.
https://hal.inria.fr/hal-01366641

Books or Proceedings Editing

[24]
D. Giannakopoulou, G. Salaün, M. Butler (editors)
Special Issue of the Formal Aspects of Computing Journal on Software Engineering and Formal Methods (SEFM'14), Springer, April 2016.
https://hal.inria.fr/hal-01419890
[25]
F. Lang, F. Flammini (editors)
Preface to the Special issue on Formal Methods for Industrial Critical Systems (FMICS'2014), Special Issue on Formal Methods for Industrial Critical Systems (FMICS'2014), Elsevier, March 2016, vol. 118. [ DOI : 10.1016/j.scico.2016.01.004 ]
https://hal.inria.fr/hal-01271895
[26]
G. Salaün, M. Stoelinga (editors)
Preface: Special Issue on Software Verification and Testing (Selected Papers from SAC-SVT'15), ACM, December 2016.
https://hal.inria.fr/hal-01419302
References in notes
[27]
N. Adadi, M. Berrada, D. Chenouni.
Formal Specification of Web Services Composition Using LOTOS, in: International Journal of Computer Technology & Applications, September 2016, vol. 7, no 5, pp. 636–642.
[28]
A. Boulgakov, T. Gibson-Robinson, A. W. Roscoe.
Computing Maximal Weak and Other Bisimulations, in: Formal Aspects of Computing, May 2016, vol. 28, no 3, pp. 381–407.
[29]
D. Champelovier, X. Clerc, H. Garavel, Y. Guerte, C. McKinty, V. Powazny, F. Lang, W. Serwe, G. Smeding.
Reference Manual of the LOTOS NT to LOTOS Translator (Version 5.7), November 2012, Inria/VASY, 153 pages.
[30]
E. M. Clarke, E. A. Emerson, A. P. Sistla.
Automatic Verification of Finite-State Concurrent Systems using Temporal Logic Specifications, in: ACM Transactions on Programming Languages and Systems, April 1986, vol. 8, no 2, pp. 244–263.
[31]
N. De Francesco, G. Lettieri, A. Santone, G. Vaglini.
Heuristic Search for Equivalence Checking, in: Software & Systems Modeling, May 2016, vol. 15, no 2, pp. 513–530.
[32]
R. De Nicola, F. W. Vaandrager.
Action versus State Based Logics for Transition Systems, Lecture Notes in Computer Science, Springer Verlag, 1990, vol. 469, pp. 407–419.
[33]
H. Garavel.
Nested-Unit Petri Nets: A Structural Means to Increase Efficiency and Scalability of Verification on Elementary Nets, in: Proceedings of the 36th International Conference on Application and Theory of Petri Nets and Concurrency (PETRI NETS'15), Brussels, Belgium, R. R. Devillers, A. Valmari (editors), Lecture Notes in Computer Science, Springer Verlag, June 2015, vol. 9115, pp. 179–199.
[34]
H. Garavel.
Compilation of LOTOS Abstract Data Types, in: Proceedings of the 2nd International Conference on Formal Description Techniques FORTE'89 (Vancouver B.C., Canada), S. T. Vuong (editor), North Holland, December 1989, pp. 147–162.
[35]
H. Garavel.
OPEN/CÆSAR: An Open Software Architecture for Verification, Simulation, and Testing, in: Proceedings of the First International Conference on Tools and Algorithms for the Construction and Analysis of Systems TACAS'98 (Lisbon, Portugal), Berlin, B. Steffen (editor), Lecture Notes in Computer Science, Springer Verlag, March 1998, vol. 1384, pp. 68–84, Full version available as Inria Research Report RR-3352.
[36]
H. Garavel, F. Lang.
SVL: a Scripting Language for Compositional Verification, in: Proceedings of the 21st IFIP WG 6.1 International Conference on Formal Techniques for Networked and Distributed Systems FORTE'2001 (Cheju Island, Korea), M. Kim, B. Chin, S. Kang, D. Lee (editors), Kluwer Academic Publishers, August 2001, pp. 377–392, Full version available as Inria Research Report RR-4223.
[37]
H. Garavel, F. Lang, R. Mateescu.
Compiler Construction using LOTOS NT, in: Proceedings of the 11th International Conference on Compiler Construction CC 2002 (Grenoble, France), N. Horspool (editor), Lecture Notes in Computer Science, Springer Verlag, April 2002, vol. 2304, pp. 9–13.
[38]
H. Garavel, R. Mateescu, I. Smarandache-Sturm.
Parallel State Space Construction for Model-Checking, in: Proceedings of the 8th International SPIN Workshop on Model Checking of Software SPIN'2001 (Toronto, Canada), Berlin, M. B. Dwyer (editor), Lecture Notes in Computer Science, Springer Verlag, May 2001, vol. 2057, pp. 217–234, Revised version available as Inria Research Report RR-4341 (December 2001).
[39]
H. Garavel, W. Serwe.
State Space Reduction for Process Algebra Specifications, in: Theoretical Computer Science, February 2006, vol. 351, no 2, pp. 131–145.
[40]
H. Garavel, J. Sifakis.
Compilation and Verification of LOTOS Specifications, in: Proceedings of the 10th International Symposium on Protocol Specification, Testing and Verification (Ottawa, Canada), L. Logrippo, R. L. Probert, H. Ural (editors), North Holland, June 1990, pp. 379–394.
[41]
H. Hansson, B. Jonsson.
A Logic for Reasoning about Time and Reliability, in: Formal Aspects of Computing, 1994, vol. 6, no 5, pp. 512–535.
[42]
M. Hennessy, R. Milner.
Algebraic Laws for Nondeterminism and Concurrency, in: Journal of the ACM, 1985, vol. 32, pp. 137–161.
[43]
L. Henrio, O. Kulankhina, S. Li, E. Madelaine.
Integrated Environment for Verifying and Running Distributed Components, in: Proceedings of the 19th International Conference on Fundamental Approaches to Software Engineering FASE'2016 (Eindhoven, The Netherlands), P. Stevens, A. Wąsowski (editors), Lecture Notes in Computer Science, Springer, April 2016, vol. 9633, pp. 66–83.
[44]
F. Jebali.
Formal Framework for Modelling and Verifying Globally Asynchronous Locally Synchronous Systems, Université Grenoble Alpes, September 2016.
[45]
C. Joubert.
Vérification distribuée à la volée de grands espaces d'états, Institut National Polytechnique de Grenoble, December 2005.
[46]
O. Kulankhina.
A Framework for Rigorous Development of Distributed Components: Formalisation and Tools, Université Nice Sophia-Antipolis, October 2016.
[47]
T. Lambolais, A.-L. Courbis, H.-V. Luong, C. Percebois.
IDF: A Framework for the Incremental Development and Conformance Verification of UML Active Primitive Components, in: Journal of Systems and Software, March 2016, vol. 113, pp. 275 –295.
[48]
T. Lambolais, A.-L. Courbis, H.-V. Luong, T.-L. Phan.
, Designing and Integrating Complex Systems: Be Agile Through Liveness Verification and AbstractionG. Auvray, J.-C. Bocquet, E. Bonjour, D. Krob (editors), Springer International Publishing, 2016, pp. 69–81.
[49]
L. Lockefeer, D. M. Williams, W. Fokkink.
Formal Specification and Verification of TCP Extended with the Window Scale Option, in: Science of Computer Programming, March 2016, vol. 118, pp. 3–23.
[50]
J. Magee, J. Kramer.
Concurrency: State Models and Java Programs, 2006, Wiley, April 2006.
[51]
R. Mateescu, D. Thivolle.
A Model Checking Language for Concurrent Value-Passing Systems, in: Proceedings of the 15th International Symposium on Formal Methods FM'08 (Turku, Finland), J. Cuellar, T. Maibaum, K. Sere (editors), Lecture Notes in Computer Science, Springer Verlag, May 2008, vol. 5014, pp. 148–164.
[52]
R. Oliveira, S. Dupuy-Chessa, G. Calvary, D. Dadolle.
Using Formal Models to Cross Check an Implementation, in: Proceedings of the 8th ACM SIGCHI Symposium on Engineering Interactive Computing Systems EICS'2016 (Brussels, Belgium), ACM, June 2016, pp. 126–137.
[53]
M. Szpyrka, J. Biernacki, A. Biernacka.
Tools and Methods for RTCP-Nets Modeling and Verification, in: Archives of Control Sciences, September 2016, vol. 26, no 3, pp. 339–365.
[54]
M. Szpyrka, P. Matyasik, J. Biernacki, A. Biernacka, M. Wypych, L. Kotulski.
Hierarchical Communication Diagrams, in: Computing and Informatics, 2016, vol. 35, no 1, pp. 55–83.
[55]
H. Sözer, M. Stoelinga, H. Boudali, M. Akşit.
Availability Analysis of Software Architecture Decomposition Alternatives for Local Recovery, in: Software Quality Journal, May 2016, pp. 1–27.
[56]
H. Wu, X. Yang, J.-P. Katoen.
, Performance Evaluation of Concurrent Data StructuresM. Fränzle, D. Kapur, N. Zhan (editors), Springer, 2016, pp. 38–49.
[57]
X. Yang, J. Katoen, H. Lin, H. Wu.
Proving Linearizability via Branching Bisimulation, in: CoRR, 2016, vol. abs/1609.07546.
[58]
Z. Zhang.
Verification Methodologies for Fault-Tolerant Network-on-Chip Systems, University of Utah, USA, May 2016.