Members
Overall Objectives
Research Program
Application Domains
New Software and Platforms
New Results
Bilateral Contracts and Grants with Industry
Partnerships and Cooperations
Dissemination
Bibliography
XML PDF e-pub
PDF e-Pub


Bibliography

Major publications by the team in recent years
[1]
T. Ayav, P. Fradet, A. Girault.
Implementing Fault-Tolerance in Real-Time Programs by Automatic Program Transformations, in: ACM Trans. Embedd. Comput. Syst., July 2008, vol. 7, no 4, pp. 1–43.
[2]
E. Bruneton, T. Coupaye, M. Leclercq, V. Quema, J.-B. Stefani.
The Fractal Component Model and its Support in Java, in: Software - Practice and Experience, 2006, vol. 36, no 11-12.
[3]
S. Djoko Djoko, R. Douence, P. Fradet.
Aspects preserving properties, in: Science of Computer Programming, 2012, vol. 77, no 3, pp. 393-422.
[4]
G. Frehse, A. Hamann, S. Quinton, M. Wöhrle.
Formal Analysis of Timing Effects on Closed-loop Properties of Control Software, in: 35th IEEE Real-Time Systems Symposium 2014 (RTSS), Rome, Italy, December 2014.
https://hal.inria.fr/hal-01097622
[5]
A. Girault, H. Kalla.
A Novel Bicriteria Scheduling Heuristics Providing a Guaranteed Global System Failure Rate, in: IEEE Trans. Dependable Secure Comput., December 2009, vol. 6, no 4, pp. 241–254, Research report Inria 6319.
http://hal.inria.fr/inria-00177117
[6]
G. Gössler, L. Astefanoaei.
Blaming in component-based real-time systems, in: Proceedings of the 14th International Conference on Embedded Software - EMSOFT'14, Delhi, India, ACM, October 2014. [ DOI : 10.1145/2656045.2656048 ]
https://hal.inria.fr/hal-01078214
[7]
G. Gössler, D. Le Métayer.
A general framework for blaming in component-based systems, in: Science of Computer Programming, 2015, vol. 113, Part 3. [ DOI : 10.1016/j.scico.2015.06.010 ]
https://hal.inria.fr/hal-01211484
[8]
S. Lenglet, A. Schmitt, J.-B. Stefani.
Characterizing Contextual Equivalence in Calculi with Passivation, in: Inf. Comput., 2011, vol. 209, no 11, pp. 1390-1433.
[9]
S. Quinton, M. Hanke, R. Ernst.
Formal analysis of sporadic overload in real-time systems, in: 2012 Design, Automation & Test in Europe Conference & Exhibition, DATE 2012, Dresden, Germany, March, 2012, 2012, pp. 515–520.
http://dx.doi.org/10.1109/DATE.2012.6176523
Publications of the year

Doctoral Dissertations and Habilitation Theses

[10]
E. Bempelis.
Boolean Parametric Data Flow Modeling - Analyses - Implementation, Université Grenoble Alpes, February 2015.
https://tel.archives-ouvertes.fr/tel-01148698
[11]
D. Burlyaev.
Design, Optimization, and Formal Verification of Circuit Fault-Tolerance Techniques, Inria Grenoble Rhône-Alpes, Université de Grenoble, November 2015.
https://tel.archives-ouvertes.fr/tel-01253368

Articles in International Peer-Reviewed Journals

[12]
A. Girard, G. Gössler, S. Mouelhi.
Safety Controller Synthesis for Incrementally Stable Switched Systems using Multiscale Symbolic Models, in: IEEE Transactions on Automatic Control, 2016, pp. 1-12. [ DOI : 10.1109/TAC.2015.2478131 ]
https://hal.archives-ouvertes.fr/hal-01197426
[13]
S. Graf, S. Quinton.
Knowledge-based construction of distributed constrained systems, in: International Journal on Software and Systems Modeling, January 2015. [ DOI : 10.1007/s10270-014-0451-z ]
https://hal.inria.fr/hal-01257059
[14]
G. Gössler, D. Le Métayer.
A general framework for blaming in component-based systems, in: Science of Computer Programming, 2015, vol. 113, Part 3. [ DOI : 10.1016/j.scico.2015.06.010 ]
https://hal.inria.fr/hal-01211484

International Conferences with Proceedings

[15]
C. Aubert.
An in-between "implicit" and "explicit" complexity: Automata, in: DICE 2015 - Developments in Implicit Computational Complexity, Londres, United Kingdom, April 2015.
https://hal.archives-ouvertes.fr/hal-01111737
[16]
C. Aubert, I. Cristescu.
Reversible Barbed Congruence on Configuration Structures, in: 8th Interaction and Concurrency Experience (ICE 2015) Satellite workshop of DisCoTec 2015, Grenoble, France, June 2015.
https://hal.archives-ouvertes.fr/hal-01157974
[17]
A. Bouakaz, P. Fradet, A. Girault.
Symbolic Buffer Sizing for Throughput-Optimal Scheduling of Dataflow Graphs, in: 22nd IEEE Real-Time Embedded Technology & Applications Symposium (RTAS 2016), Vienne, Austria, April 2016.
https://hal.inria.fr/hal-01253168
[18]
D. Burlyaev, P. Fradet.
Formal Verification of Automatic Circuit Transformations for Fault-Tolerance, in: Formal Methods in Computer-Aided Design (FMCAD 2015), Austin, Texas, United States, September 2015.
https://hal.inria.fr/hal-01253127
[19]
D. Burlyaev, P. Fradet, A. Girault.
Automatic Time-Redundancy Transformation for Fault-Tolerant Circuits, in: 23rd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA'15, Monterey, United States, February 2015. [ DOI : 10.1145/2684746.2689058 ]
https://hal.inria.fr/hal-01095747
[20]
D. Burlyaev, P. Fradet, A. Girault.
Time-redundancy transformations for adaptive fault-tolerant circuits, in: 2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), Montreal, Canada, June 2015. [ DOI : 10.1109/AHS.2015.7231164 ]
https://hal.inria.fr/hal-01253111
[21]
B. Claudel, Q. Sabah, J.-B. Stefani.
Simple Isolation for an Actor Abstract Machine, in: 35th IFIP International Conference on Formal Techniques for Distributed Objects, Components and Systems, Montbonnot, France, Lecture Notes in Computer Science, Springer, June 2015, vol. 9039. [ DOI : 10.1007/978-3-319-19195-9_14 ]
https://hal.inria.fr/hal-01219656
[22]
O. Gettings, S. Quinton, R. Davis.
Mixed criticality systems with weakly-hard constraints, in: International Conference on Real Time and Networks Systems, Lille, France, November 2015. [ DOI : 10.1145/2834848.2834850 ]
https://hal.inria.fr/hal-01257067
[23]
G. Gössler, J.-B. Stefani.
Fault Ascription in Concurrent Systems, in: Trustworthy Global Computing, Madrid, Spain, P. Ganty, M. Loreti (editors), TGC 2015, Springer, 2015, vol. 9533, 16 p. [ DOI : 10.1007/978-3-319-28766-9 6 ]
https://hal.inria.fr/hal-01246485
[24]
W.-T. Sun, A. Girault, G. Delaval.
A formal approach for the synthesis and implementation of fault-tolerant industrial embedded systems, in: SIES'2015: 10th IEEE International Symposium on Industrial Embedded Systems, Siegen, Germany, June 2015.
https://hal.inria.fr/hal-01165686
[25]
S. Wang, Y. Geoffroy, G. Gössler, O. Sokolsky, I. Lee.
A Hybrid Approach to Causality Analysis, in: RV 2015 - 6th International Conference on Runtime Verification, Vienna, Austria, LNCS, September 2015, vol. 9333. [ DOI : 10.1007/978-3-319-23820-3_16 ]
https://hal.inria.fr/hal-01211607
[26]
X. Wenbo, Z. A. H. Hammadeh, K. Alexander, S. Quinton, R. Ernst.
Improved Deadline Miss Models for Real-Time Systems Using Typical Worst-Case Analysis, in: Euromicro Conference on Real-Time Systems, Lund, Sweden, July 2015. [ DOI : 10.1109/ECRTS.2015.29 ]
https://hal.inria.fr/hal-01257065

Books or Proceedings Editing

[27]
A. Girault, G. Nan (editors)
2015 International Conference on Embedded Software, EMSOFT'15, IEEE, Amsterdam, Netherlands, October 2015.
https://hal.archives-ouvertes.fr/hal-01271544
[28]
J. Krivine, J.-B. Stefani (editors)
Reversible Computation, Lecture Notes in Computer Science, Springer, Grenoble, France, July 2015, vol. 9138. [ DOI : 10.1007/978-3-319-20860-2 ]
https://hal.inria.fr/hal-01246644

Internal Reports

[29]
A. Bouakaz, P. Fradet, A. Girault.
Symbolic Analysis of Dataflow Graphs (Extended Version), Inria - Research Centre Grenoble – Rhône-Alpes, January 2016, no 8742.
https://hal.inria.fr/hal-01166360
[30]
G. Gössler, J.-B. Stefani.
Fault Ascription in Concurrent Systems, Inria Grenoble - Rhône-Alpes, September 2015, no RR-8772.
https://hal.inria.fr/hal-01197486

Other Publications

[31]
C. Aubert, I. Cristescu.
Contextual equivalences in configuration structures and reversibility, November 2015, working paper or preprint.
https://hal.archives-ouvertes.fr/hal-01229408
References in notes
[32]
Automotive Open System Architecture, 2003.
http://www.autosar.org
[33]
G. Leavens, M. Sitaraman (editors)
Foundations of Component-Based Systems, Cambridge University Press, 2000.
[34]
Z. Liu, H. Jifeng (editors)
Mathematical Frameworks for Component Software - Models for Analysis and Synthesis, World Scientific, 2006.
[35]
ARTEMIS Joint Undertaking.
ARTEMIS Strategic Research Agenda, 2011.
[36]
S. Andalam, P. Roop, A. Girault.
Predictable Multithreading of Embedded Applications Using PRET-C, in: International Conference on Formal Methods and Models for Codesign, MEMOCODE'10, Grenoble, France, IEEE, July 2010, pp. 159–168.
[37]
I. Assayad, A. Girault, H. Kalla.
Tradeoff Exploration between Reliability, Power Consumption, and Execution Time for Embedded Systems, in: Int. J. Software Tools for Technology Transfer, June 2013, vol. 15, no 3, pp. 229–245.
[38]
P. Axer, R. Ernst, H. Falk, A. Girault, D. Grund, N. Guan, B. Jonsson, P. Marwedel, J. Reineke, C. Rochange, M. Sebatian, R. von Hanxleden, R. Wilhelm, W. Yi.
Building Timing Predictable Embedded Systems, in: ACM Trans. Embedd. Comput. Syst., 2014, To appear.
[39]
E. Bainomugisha, A. Carreton, T. Van Cutsem, S. Mostinckx, W. De Meuter.
A Survey on Reactive Programming, in: ACM Computing Surveys, 2013, vol. 45, no 4.
[40]
A. Basu, S. Bensalem, M. Bozga, J. Combaz, M. Jaber, T.-H. Nguyen, J. Sifakis.
Rigorous Component-Based System Design Using the BIP Framework, in: IEEE Software, 2011, vol. 28, no 3.
[41]
V. Bebelis, P. Fradet, A. Girault.
A Framework to Schedule Parametric Dataflow Applications on Many-Core Platforms, in: International Conference on Languages, Compilers and Tools for Embedded Systems, LCTES'14, Edinburgh, UK, ACM, June 2014.
[42]
V. Bebelis, P. Fradet, A. Girault, B. Lavigueur.
BPDF: A Statically Analyzable Dataflow Model with Integer and Boolean Parameters, in: International Conference on Embedded Software, EMSOFT'13, Montreal, Canada, ACM, September 2013.
[43]
A. Benveniste, P. Caspi, S. A. Edwards, N. Halbwachs, P. Le Guernic, R. de Simone.
The synchronous languages 12 years later, in: Proceedings of the IEEE, 2003, vol. 91, no 1.
[44]
A. Benveniste, J. Raclet, B. Caillaud, D. Nickovic, R. Passerone, A. Sangiovanni-Vicentelli, T. Henzinger, K. Larsen.
Contracts for the Design of Embedded Systems Part I: Methodology and Use Cases, in: Proceedings of the IEEE, 2012.
[45]
A. Benveniste, J. Raclet, B. Caillaud, D. Nickovic, R. Passerone, A. Sangiovanni-Vicentelli, T. Henzinger, K. Larsen.
Contracts for the Design of Embedded Systems Part II: Theory, in: Proceedings of the IEEE, 2012.
[46]
B. Bonakdarpour, S. S. Kulkarni, F. Abujarad.
Symbolic synthesis of masking fault-tolerant distributed programs, in: Distributed Computing, 2012, vol. 25, no 1.
[47]
S. Borkar.
Designing Reliable Systems from Unreliable Components: The Challenges of Transistor Variability and Degradation, in: IEEE Micro, 2005, vol. 25, no 6.
[48]
R. Bruni, H. C. Melgratti, U. Montanari.
Theoretical foundations for compensations in flow composition languages, in: 32nd ACM Symposium on Principles of Programming Languages (POPL), ACM, 2005.
[49]
S. Burckhardt, D. Leijen.
Semantics of Concurrent Revisions, in: European Symposium on Programming, ESOP'11, Saarbrucken, Germany, LNCS, Springer, March 2011, no 6602, pp. 116–135.
[50]
D. Burlyaev, P. Fradet, A. Girault.
Procédé de fabrication automatisée d'un circuit électronique adapté pour détecter ou masquer des fautes par redondance temporelle, programme d'ordinateur et circuit électronique associés, June 2014, no 1456080.
https://hal.inria.fr/hal-01096054
[51]
P. Caspi, M. Pouzet.
Synchronous Kahn Networks, in: ACM SIGPLAN International Conference on Functional Programming, ICFP'96, Philadelphia (PA), USA, ACM, May 1996.
[52]
T. Chothia, D. Duggan.
Abstractions for fault-tolerant global computing, in: Theor. Comput. Sci., 2004, vol. 322, no 3.
[53]
Coq development team.
The Coq proof assistant, 1989-2014.
http://coq.inria.fr/
[54]
R. Davis, A. Burns.
A Survey of Hard Real-Time Scheduling for Multiprocessor Systems, in: ACM Computing Surveys, 2011, vol. 43, no 4.
[55]
V. De Florio, C. Blondia.
A Survey of Linguistic Structures for Application-Level Fault-Tolerance, in: ACM Computing Surveys, 2008, vol. 40, no 2.
[56]
G. Delaval.
Répartition modulaire de programmes synchrones, INPG, Inria Grenoble Rhône-Alpes, July 2008, PhD thesis.
[57]
G. Delaval, A. Girault, M. Pouzet.
A Type System for the Automatic Distribution of Higher-order Synchronous Dataflow Programs, in: International Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES'08, Tucson (AZ), USA, ACM, June 2008, pp. 101–110.
ftp://ftp.inrialpes.fr/pub/bip/pub/girault/Publications/Lctes08/main.pdf
[58]
G. Delaval, H. Marchand, É. Rutten.
Contracts for Modular Discrete Controller Synthesis, in: ACM International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2010), Stockholm, Sweden, April 2010.
http://pop-art.inrialpes.fr/people/delaval/pub/lctes2010.pdf
[59]
S. A. Edwards, E. A. Lee.
The Case for the Precision Timed (PRET) Machine, in: 44th Design Automation Conference (DAC), IEEE, 2007.
[60]
J. Eker, J. W. Janneck, E. A. Lee, J. Liu, X. Liu, J. Ludvig, S. Neuendorffer, S. Sachs, Y. Xiong.
Taming heterogeneity - the Ptolemy approach, in: Proceedings of the IEEE, 2003, vol. 91, no 1.
[61]
J. Field, C. A. Varela.
Transactors: a programming model for maintaining globally consistent distributed state in unreliable environments, in: 32nd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL), ACM, 2005.
[62]
P. Fradet, A. Girault, P. Poplavko.
SPDF: A Schedulable Parametric Data-Flow MoC, in: Design Automation and Test in Europe, DATE'12, Dresden, Germany, 2012.
http://hal.inria.fr/hal-00744376
[63]
A. Girard, G. Pappas.
Approximation metrics for discrete and continuous systems, in: IEEE Trans. on Automatic Control, 2007, vol. 52, no 5, pp. 782–798.
[64]
A. Girault, H. Kalla.
A Novel Bicriteria Scheduling Heuristics Providing a Guaranteed Global System Failure Rate, in: IEEE Trans. Dependable Secure Comput., December 2009, vol. 6, no 4, pp. 241–254, Research report Inria 6319.
http://www.computer.org/portal/web/csdl/doi/10.1109/TDSC.2008.50
[65]
A. Girault, É. Rutten.
Automating the Addition of Fault Tolerance with Discrete Controller Synthesis, in: Formal Methods in System Design, October 2009, vol. 35, no 2, pp. 190–225.
http://www.springerlink.com/content/w726262156h4822j
[66]
D. Gizopoulos, M. Psarakis, S. V. Adve, P. Ramachandran, S. K. S. Hari, D. Sorin, A. Meixner, A. Biswas, X. Vera.
Architectures for Online Error Detection and Recovery in Multicore Processors, in: Design Automation and Test in Europe (DATE), 2011.
[67]
F. C. Gärtner.
Fundamentals of Fault-Tolerant Distributed Computing in Asynchronous Environments, in: ACM Computing Surveys, 1999, vol. 31, no 1.
[68]
S. Haar, E. Fabre.
Diagnosis with Petri Net Unfoldings, in: Control of Discrete-Event Systems, Lecture Notes in Control and Information Sciences, Springer, 2013, vol. 433, chap. 15.
[69]
N. Halbwachs, P. Caspi, P. Raymond, D. Pilaud.
The Synchronous Data-Flow Programming Language Lustre, in: Proceedings of the IEEE, September 1991, vol. 79, no 9, pp. 1305–1320.
[70]
J. Halpern, J. Pearl.
Causes and Explanations: A Structural-Model Approach. Part I: Causes, in: British Journal for the Philosophy of Science, 2005, vol. 56, no 4, pp. 843-887.
[71]
Z. A. H. Hammadeh, S. Quinton, R. Ernst.
Extending typical worst-case analysis using response-time dependencies to bound deadline misses, in: 14th International Conference on Embedded Software 2014 (EMSOFT), New Delhi, India, October 2014. [ DOI : 10.1145/2656045.2656059 ]
https://hal.inria.fr/hal-01097621
[72]
D. Harmanci, V. Gramoli, P. Felber.
Atomic Boxes: Coordinated Exception Handling with Transactional Memory, in: 25th European Conference on Object-Oriented Programming (ECOOP), Lecture Notes in Computer Science, 2011, vol. 6813.
[73]
T. Henzinger, J. Sifakis.
The Embedded Systems Design Challenge, in: Formal Methods 2006, Lecture Notes in Computer Science, Springer, 2006, vol. 4085.
[74]
I. Hwang, S. Kim, Y. Kim, C. E. Seah.
A Survey of Fault Detection, Isolation and Reconfiguration Methods, in: IEEE Trans. on Control Systems Technology, 2010, vol. 18, no 3.
[75]
V. Izosimov, P. Pop, P. Eles, Z. Peng.
Scheduling and Optimization of Fault-Tolerant Embedded Systems with Transparency/Performance Trade-Offs, in: ACM Trans. Embedded Comput. Syst., 2012, vol. 11, no 3, 61 p.
[76]
R. Küsters, T. Truderung, A. Vogt.
Accountability: definition and relationship to verifiability, in: ACM Conference on Computer and Communications Security, 2010, pp. 526-535.
[77]
I. Lanese, C. A. Mezzina, J.-B. Stefani.
Reversing Higher-Order Pi, in: 21th International Conference on Concurrency Theory (CONCUR), Lecture Notes in Computer Science, Springer, 2010, vol. 6269.
[78]
E. A. Lee, A. L. Sangiovanni-Vincentelli.
Component-based design for the future, in: Design, Automation and Test in Europe, DATE 2011, IEEE, 2011.
[79]
H. Marchand, P. Bournai, M. Le Borgne, P. Le Guernic.
Synthesis of Discrete-Event Controllers based on the Signal Environment, in: Discrete Event Dynamical System: Theory and Applications, October 2000, vol. 10, no 4, pp. 325–346.
[80]
P. Menzies.
Counterfactual Theories of Causation, in: Stanford Encyclopedia of Philosophy, E. Zalta (editor), Stanford University, 2009.
http://plato.stanford.edu/entries/causation-counterfactual
[81]
M. Moore.
Causation and Responsibility, Oxford, 1999.
[82]
J. Pearl.
Causal inference in statistics: An overview, in: Statistics Surveys, 2009, vol. 3, pp. 96-146.
[83]
P. Ramadge, W. Wonham.
Supervisory Control of a Class of Discrete Event Processes, in: SIAM Journal on control and optimization, January 1987, vol. 25, no 1, pp. 206–230.
[84]
G. Ramalingam, K. Vaswani.
Fault tolerance via idempotence, in: 40th Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL), ACM, 2013.
[85]
B. Randell.
System Structure for Software Fault Tolerance, in: IEEE Trans. on Software Engineering, 1975, vol. 1, no 2.
[86]
J. Rushby.
Partitioning for Safety and Security: Requirements, Mechanisms, and Assurance, NASA Langley Research Center, 1999, no CR-1999-209347.
[87]
M. Sheeran.
muFP, A Language for VLSI Design, in: LISP and Functional Programming, 1984, pp. 104–112.
[88]
J.-B. Stefani.
Components as Location Graphs, in: 11th International Symposium on Formal Aspects of Component Software, Bertinoro, Italy, Lecture Notes in Computer Science, September 2014, vol. 8997.
https://hal.inria.fr/hal-01094208
[89]
W.-T. Sun, Z. A. Salcic, A. Girault, A. Malik.
libDGALS: A library-based approach to design dynamic GALS systems, in: International Symposium on Industrial Embedded Systems, SIES'14, Pisa, Italy, IEEE, June 2014, pp. 104–111.
[90]
P. Tabuada.
Verification and Control of Hybrid Systems - A Symbolic Approach, Springer, 2009.
[91]
D. Walker, L. W. Mackey, J. Ligatti, G. A. Reis, D. I. August.
Static typing for a faulty lambda calculus, in: 11th ACM SIGPLAN International Conference on Functional Programming (ICFP), ACM, 2006.
[92]
R. Wilhelm, J. Engblom, A. Ermedahl, N. Holsti, S. Thesing, D. B. Whalley, G. Bernat, C. Ferdinand, R. Heckmann, T. Mitra, F. Mueller, I. Puaut, P. P. Puschner, J. Staschulat, P. Stenström.
The Determination of Worst-Case Execution Times — Overview of the Methods and Survey of Tools, in: ACM Trans. Embedd. Comput. Syst., April 2008, vol. 7, no 3.
[93]
E. Yip, P. Roop, M. Biglari-Abhari, A. Girault.
Programming and Timing Analysis of Parallel Programs on Multicores, in: International Conference on Application of Concurrency to System Design, ACSD'13, Barcelona, Spain, IEEE, July 2013, pp. 167–176.
https://hal.inria.fr/hal-00842402