Members
Overall Objectives
Research Program
Application Domains
Highlights of the Year
New Software and Platforms
New Results
Bilateral Contracts and Grants with Industry
Partnerships and Cooperations
Dissemination
Bibliography
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Bibliography

Major publications by the team in recent years
[1]
C. André.
Syntax and Semantics of the Clock Constraint Specification Language (CCSL), Inria, 05 2009, no RR-6925, 37 p.
http://hal.inria.fr/inria-00384077/en/
[2]
C. André, J. Deantoni, F. Mallet, R. de Simone.
The Time Model of Logical Clocks available in the OMG MARTE profile, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, pp. 201–227, Chapter 7.
[3]
C. André, F. Mallet, R. de Simone.
Modeling Time(s), in: MoDELS'2007 10th Intern. Conf. on Model Driven Engineering Languages and Systems, 2007.
[4]
A. Benveniste, P. Caspi, S. Edwards, N. Halbwachs, P. Le Guernic, R. de Simone.
Synchronous Languages Twelve Years Later, in: Proceedings of the IEEE, January 2003.
[5]
J. Boucaron, A. Coadou, R. de Simone.
Formal Modeling of Embedded Systems with Explicit Schedules and Routes, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, pp. 41–78, Chapter 2.
[6]
J. Boucaron, R. de Simone, J.-V. Millo.
Latency-insensitive design and central repetitive scheduling, in: MEMOCODE, 2006, pp. 175-183.
http://dx.doi.org/10.1109/MEMCOD.2006.1695923
[7]
L. Cucu-Grosjean, N. Pernet, Y. Sorel.
Periodic real-time scheduling: from deadline-based model to latency-based model, in: Annals of Operations Research, 2007.
http://www-rocq.inria.fr/syndex/publications/pubs/aor07/aor07.pdf
[8]
T. Grandpierre, C. Lavarenne, Y. Sorel.
Optimized Rapid Prototyping For Real-Time Embedded Heterogeneous multiprocessors, in: Proceedings of 7th International Workshop on Hardware/Software Co-Design, CODES'99, 1999.
[9]
T. Grandpierre, Y. Sorel.
From Algorithm and Architecture Specification to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations, in: Proceedings of First ACM and IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE'03, Mont Saint-Michel, France, June 2003.
http://www-rocq.inria.fr/syndex/publications/pubs/memocode03/memocode03.pdf
[10]
P. Meumeu Yomsi, Y. Sorel.
Extending Rate Monotonic Analysis with Exact Cost of Preemptions for Hard Real-Time Systems, in: Proceedings of 19th Euromicro Conference on Real-Time Systems, ECRTS'07, Pisa, Italy, July 2007.
http://www-rocq.inria.fr/syndex/publications/pubs/ecrts07/ecrts07.pdf
[11]
D. Potop-Butucaru, Benoît. Caillaud.
Correct-by-Construction Asynchronous Implementation of Modular Synchronous Specifications, in: Fundam. Inf., January 2007, vol. 78, pp. 131–159.
http://portal.acm.org/citation.cfm?id=1366007.1366013
[12]
D. Potop-Butucaru, R. de Simone, Y. Sorel.
From Synchronous Specifications to Statically-Scheduled Hard Real-Time Implementations, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, pp. 229–262, Chapter 8.
[13]
D. Potop-Butucaru, S. Edwards, G. Berry.
Compiling Esterel, Springer, 2007.
[14]
D. Potop-Butucaru, R. de Simone.
Optimizations for Faster Execution of Esterel Programs, in: MEMOCODE'03, 2003.
[15]
R. de Simone, D. Potop-Butucaru, Jean-Pierre. Talpin.
The Synchronous Hypothesis and Synchronous Languages, in: Embedded Systems Handbook, CRC Press, 2005, chap. 8.
Publications of the year

Doctoral Dissertations and Habilitation Theses

[16]
M. A. BERGACH.
Adaptation of the Fast Fourier Transform processing on hybride integrated CPU/GPU architecture, Université Nice Sophia Antipolis, October 2015.
https://hal.inria.fr/tel-01245958
[17]
D. Potop-Butucaru.
Real-Time Systems Compilation, EDITE, November 2015, Habilitation à diriger des recherches.
https://hal.inria.fr/tel-01264021

Articles in International Peer-Reviewed Journals

[18]
T. Carle, D. Potop-Butucaru, Y. Sorel, D. Lesens.
From Dataflow Specification to Multiprocessor Partitioned Time-triggered Real-time Implementation *, in: Leibniz Transactions on Embedded Systems, November 2015. [ DOI : 10.4230/LITES-v002-i002-a001 ]
https://hal.inria.fr/hal-01263994
[19]
R. Davis, M. Bertogna, V. Bonifaci.
On the Compatibility of Exact Schedulability Tests for Global Fixed Priority Preemptive Scheduling with Audsley’s Optimal Priority Assignment Algorithm, in: Real-Time Systems, September 2015. [ DOI : 10.1007/s11241-015-9241-0 ]
https://hal.inria.fr/hal-01231694
[20]
F. Mallet, R. De Simone.
Correctness Issues on MARTE/CCSL constraints, in: Science of Computer Programming, August 2015, vol. 106, pp. 78-92. [ DOI : 10.1016/j.scico.2015.03.001 ]
https://hal.inria.fr/hal-01257978
[21]
J.-V. Millo, E. Kofman, R. D. Simone.
Modeling and Analyzing Dataflow Applications on NoC-Based Many-Core Architectures, in: ACM Transactions in Embedded Computing Systems, April 2015, vol. 14, no 3, article 46. [ DOI : 10.1145/2700081 ]
https://hal.archives-ouvertes.fr/hal-01097315
[22]
L. Santinelli, L. Cucu-Grosjean.
A Probabilistic Calculus for Probabilistic Real-Time Systems, in: ACM Transactions in Embedded Computing Systems, 2015, vol. 14, no 3. [ DOI : 10.1145/2717113 ]
https://hal.inria.fr/hal-01244333
[23]
A. Sebastian, L. Cucu-Grosjean, R. Davis.
Static probabilistic timing analysis for real-time systems using random replacement caches , in: Real-Time Systems, 2015, vol. 51, no 1, pp. 77-123. [ DOI : 10.1007/s11241-014-9218-4 ]
https://hal.inria.fr/hal-01244349

Invited Conferences

[24]
L. Cucu-Grosjean.
Probabilistic Approaches for Time Critical Embedded Systems, in: 9th International Workshop on Verification and Evaluation of Computer and Communication Systems, Bucarest, Romania, September 2015.
https://hal.inria.fr/hal-01244360

International Conferences with Proceedings

[25]
C. Boudjennah, B. Combemale, D. Exertier, S. Lacrampe, M.-A. Peraldi-Frati.
CLARITY: Open-Sourcing the Model-Based Systems Engineering Solution Capella, in: Second Workshop on Open Source Software for Model Driven Engineering (OSS4MDE’15), Ottawa, Canada, CEUR, 2015.
https://hal.inria.fr/hal-01186019
[26]
A. Cohen, V. Perrelle, D. Potop-Butucaru, M. Pouzet, E. Soubiran, Z. Zhang.
Hard Real Time and Mixed Time Criticality on Off-The-Shelf Embedded Multi-Cores, in: International Conference on Embedded and Real-Time Software and Systems (ERTS²), Toulouse, France, 2016.
https://hal.archives-ouvertes.fr/hal-01257225
[27]
B. Combemale, C. Brun, J. Champeau, X. Crégut, J. Deantoni, J. Le Noir.
A Tool-Supported Approach for Concurrent Execution of Heterogeneous Models, in: 8th European Congress on Embedded Real Time Software and Systems (ERTS 2016), Toulouse, France, 2016.
https://hal.inria.fr/hal-01258358
[28]
J. Deantoni, P. Issa Diallo, C. Teodorov, J. Champeau, B. Combemale.
Towards a Meta-Language for the Concurrency Concern in DSLs, in: Design, Automation and Test in Europe Conference and Exhibition (DATE), Grenoble, France, March 2015.
https://hal.inria.fr/hal-01087442
[29]
O. Gettings, S. Quinton, R. Davis.
Mixed criticality systems with weakly-hard constraints, in: International Conference on Real Time and Networks Systems, Lille, France, November 2015. [ DOI : 10.1145/2834848.2834850 ]
https://hal.inria.fr/hal-01257067
[30]
F. Latombe, X. Crégut, B. Combemale, J. Deantoni, M. Pantel.
Weaving Concurrency in eXecutable Domain-Specific Modeling Languages, in: 8th ACM SIGPLAN International Conference on Software Language Engineering (SLE), Pittsburg, United States, ACM, 2015.
https://hal.inria.fr/hal-01185911
[31]
F. Latombe, X. Crégut, J. Deantoni, M. Pantel, B. Combemale.
Coping with Semantic Variation Points in Domain-Specific Modeling Languages, in: 1st International Workshop on Executable Modeling (EXE'15), co-located with MODELS'15, Ottawa, Canada, CEUR, 2015.
https://hal.inria.fr/hal-01222999
[32]
A. Mehmood Khan, F. Mallet, R. Muhammad.
Modeling SystemVerilog Assertions using SysML and CCSL, in: Electronic System Level Synthesis Conference, San Francisco, United States, June 2015.
https://hal.inria.fr/hal-01257934
[33]
M. E. Vara Larsen, J. Deantoni, B. Combemale, F. Mallet.
A Behavioral Coordination Operator Language (BCOoL), in: International Conference on Model Driven Engineering Languages and Systems (MODELS), Ottawa, Canada, T. Lethbridge, J. Cabot, A. Egyed (editors), ACM, September 2015, no 18, 462 p, to be published in the proceedings of the Models 2015 conference.
https://hal.inria.fr/hal-01182773

Conferences without Proceedings

[34]
S. Altmeyer, R. Davis, L. Soares Indrusiak, C. Maiza, V. Nélis, J. Reineke.
A Generic and Compositional Framework for Multicore Response Time Analysis, in: RTNS 2015 - 23rd International Conference on Real-Time Networks and Systems, Lille, France, November 2015, pp. 129-138, Outstanding paper award. [ DOI : 10.1145/2834848.2834862 ]
https://hal.inria.fr/hal-01231700
[35]
A. Cohen, V. Perrelle, D. Potop-Butucaru, M. Pouzet, E. Soubiran, Z. Zhang.
Hard Real Time and Mixed Time Criticality on Off-The-Shelf Embedded Multi-Cores, in: 8th European Congress on Embedded Real Time Software and Systems (ERTS 2016), Toulouse, France, January 2016.
https://hal.archives-ouvertes.fr/hal-01259157
[36]
R. Davis, A. Burns, V. Pollex, F. Slomka.
On Priority Assignment for Controller Area Network when some Message Identifiers are Fixed, in: RTNS 2015 - 23rd International Conference on Real-Time Networks and Systems, Lille, France, November 2015, pp. 279-288. [ DOI : 10.1145/2834848.2834866 ]
https://hal.inria.fr/hal-01231705
[37]
R. Davis, A. Thekkilakattil, O. Gettings, R. Dobrin, S. Punnekkat.
Quantifying the Exact Sub-Optimality of Non-Preemptive Scheduling, in: 36th Real-Time Systems Symposium (RTSS 2015), San Antonio, Texas, United States, December 2015.
https://hal.inria.fr/hal-01231718
[38]
R. A. Gorcitz, T. Carle, D. Lesens, D. Monchaux, D. Potop-Butucaru, Y. Sorel.
Automatic implementation of TTEthernet-based time-triggered avionics applications, in: DASIA 2015, Barcelone, Spain, Eurospace, May 2015.
https://hal.inria.fr/hal-01264687
[39]
R. Gorcitz, E. Kofman, T. Carle, D. Potop-Butucaru, R. De Simone.
On the Scalability of Constraint Solving for Static/Off-Line Real-Time Scheduling, in: 13th International Conference on Formal Modeling and Analysis of Timed Systems, Madrid, Spain, September 2015. [ DOI : 10.1007/978-3-319-22975-1_8 ]
https://hal.inria.fr/hal-01250010
[40]
D. Griffin, B. Lesage, I. Bate, F. Soboczenski, R. I. Davis.
Modelling Fault Dependencies when Execution Time Budgets are Exceeded, in: 23rd International Conference on Real-Time Networks and Systems (RTNS 2015), Lille, France, November 2015, pp. 129-138. [ DOI : 10.1145/2834848.2834870 ]
https://hal.inria.fr/hal-01230443
[41]
A. Khecharem, R. De Simone.
A Multi-View Co-Modeling and Co-Simulation Framework for Heterogeneous Embedded Systems, in: eSAME 2015 - Embedded software and micro-electronics conference, Sophia Antipolis, France, eSAME, November 2015.
https://hal.inria.fr/hal-01243219
[42]
B. Lesage, D. Griffin, S. Altmeyer, R. Davis.
Static Probabilistic Timing Analysis for Multi-path Programs, in: RTSS 2015 - 36th Real-Time Systems Symposium, San Antonio, Texas, United States, December 2015.
https://hal.inria.fr/hal-01231729
[43]
B. Lesage, D. Griffin, F. Soboczenski, I. Bate, R. Davis.
A Framework For The Evaluation Of Measurement-based Timing Analyses, in: 23rd International Conference on Real-Time Networks and Systems (RTNS 2015), Lille, France, November 2015, pp. 35-44.
https://hal.inria.fr/hal-01231710
[44]
M. E. Vara Larsen, J. Deantoni, B. Combemale, F. Mallet.
A Model-Driven Based Environment for Automatic Model Coordination, in: Models 2015 demo and posters, Ottawa, Canada, CEUR (editor), October 2015.
https://hal.inria.fr/hal-01198744
[45]
F. Wartel, L. Kosmidis, A. G. Gogonel, A. Baldovin, Z. Stephenson, B. Triquet, E. Quinones, C. Lo, E. Mezzetti, B. Ian, J. Abella, L. Cucu-Grosjean, T. Vardanega, F. J. Cazorla.
Timing analysis of an avionics case study on complex hardware/software platforms, in: Design, Automation and Test in Europe, Grenoble, France, March 2015, pp. 397-402.
https://hal.inria.fr/hal-01244373

Scientific Books (or Scientific Book chapters)

[46]
Mixed Criticality on Multicore/Manycore Platforms (Dagstuhl Seminar 15121), 2015. [ DOI : 10.4230/DagRep.5.3.84 ]
https://hal.inria.fr/hal-01244394
[47]
Joint Proceedings of the 3rd International Workshop on the Globalization Of Modeling Languages and the 9th International Workshop on Multi-Paradigm Modeling, Joint Proceedings of the 3rd International Workshop on the Globalization Of Modeling Languages and the 9th International Workshop on Multi-Paradigm Modeling, CEUR, Ottawa, Canada, 2015, vol. 1511.
https://hal.inria.fr/hal-01242558
[48]
Proceedings of the 3rd International Workshop on Mixed Criticality Systems, 2015.
https://hal.inria.fr/hal-01244384
[49]
Proceedings of the 23rd International Conference on Real-Time Networks and Systems, ACM Digital Library, Lille, France, 2015.
https://hal.inria.fr/hal-01244383
[50]
J. Deantoni, C. Brun, B. Caillaud, R. France, G. Karsai, O. Nierstrasz, E. Syriani.
Domain Globalization: Using Languages to Support Technical and Social Coordination, in: Globalizing Domain-Specific Languages, B. Combemale, B. H. Cheng, R. B. France, J.-M. Jézéquel, B. Rumpe (editors), Lecture Notes in Computer Science, Springer International Publishing, 2015, vol. 9400, pp. 70-87. [ DOI : 10.1007/978-3-319-26172-0_5 ]
https://hal.archives-ouvertes.fr/hal-01234653
[51]
F. Mallet, Z. Grygoriy.
Co-Algebraic Semantic Model for the Clock Constraint Specification Language, in: Communications in Computer and Information Science, Springer, April 2015, vol. 476, pp. 174-188. [ DOI : 10.1007/978-3-319-17581-2_12 ]
https://hal.inria.fr/hal-01257952
[52]
F. Mallet.
MARTE/CCSL for Modeling Cyber-Physical Systems, in: Formal Modeling and Verification of Cyber-Physical Systems, Springer Fachmedien Wiesbaden, June 2015, pp. 26-49. [ DOI : 10.1007/978-3-658-09994-7_2 ]
https://hal.inria.fr/hal-01258084

Internal Reports

[53]
A. Khecharem, R. De Simone.
A Multi-View Co-Modeling and Co-Simulation Framework for Heterogeneous Embedded Systems, Inria Sophia Antipolis, July 2015.
https://hal.inria.fr/hal-01181003
[54]
Q. Xu, R. De Simone, J. Deantoni.
Logical Clock Constraint Specification in PVS, Inria Sophia Antipolis, June 2015, no 8748, 11 p.
https://hal.inria.fr/hal-01192839

Scientific Popularization

[55]
D. Potop-Butucaru.
Quand la RespberryPi se met à l'avionique, in: Open Silicium, July 2015.
https://hal.inria.fr/hal-01264052

Other Publications

[56]
A. G. Gogonel, L. Cucu-Grosjean.
How do we prove that probabilistic worst case response time is a Gumbel?, July 2015, 6th Real-Time Scheduling Open Problems Seminar, Poster.
https://hal.inria.fr/hal-01245353
[57]
R. Gorcitz, E. Kofman, T. Carle, D. Potop-Butucaru, R. De Simone.
On the Scalability of Constraint Solving for Static/Off-Line Real-Time Scheduling, July 2015, working paper or preprint.
https://hal.inria.fr/hal-01179489
[58]
T. Walid, C. Maxim, A. G. Gogonel, Y. Sorel, L. Cucu-Grosjean.
Estimation of probabilistic worst case execution time while accounting OS costs, April 2015, Work in Progress of the 21st IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS2015), Poster.
https://hal.inria.fr/hal-01245359
References in notes
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F. Baccelli, G. Cohen, Geert Jan. Olsder, Jean-Pierre. Quadrat.
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A. Benveniste, G. Berry.
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J. Carlier, P. Chrétienne.
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L. Carloni, K. McMillan, A. Sangiovanni-Vincentelli.
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[63]
A. Cohen, M. Duranton, C. Eisenbeis, C. Pagetti, F. Plateau, M. Pouzet.
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J.B. Dennis.
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[65]
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N. Halbwachs.
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Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing, in: IEEE Trans. Computers, 1987.
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