Overall Objectives
Research Program
Application Domains
Software and Platforms
New Results
Partnerships and Cooperations
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Major publications by the team in recent years
D. Chillet, A. Eiche, S. Pillement, O. Sentieys.
Real-time scheduling on heterogeneous system-on-chip architectures using an optimised artificial neural network, in: Journal of Systems Architecture - Embedded Systems Design, April 2011, vol. 57, no 4, pp. 340-353.
L. Collin, O. Berder, P. Rostaing, G. Burel.
Optimal Minimum Distance Based Precoder for MIMO Spatial Multiplexing Systems, in: IEEE Transactions on Signal Processing, March 2004, vol. 52, no 3.
A. Courtay, O. Sentieys, J. Laurent, N. Julien.
High-level Interconnect Delay and Power Estimation, in: Journal of Low Power Electronics (JOLPE), 2008, vol. 4, no 1, pp. 21-33.
R. David, S. Pillement, O. Sentieys.
Energy-Efficient Reconfigurable Processsors, in: Low Power Electronics Design, C. Piguet (editor), Computer Engineering, Vol 1, CRC Press, August 2004, chap. 20.
S. Derrien, P. Quinton.
Parallelizing HMMER for Hardware Acceleration on FPGAs, in: 18th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2007), Montreal, Canada, July 2007, pp. 10–18, Best Paper Award.
S. Derrien, S. Rajopadhye, P. Quinton, T. Risset.
12, in: High-Level Synthesis of Loops Using the Polyhedral Model: The MMAlpha Software, P. Coussy, A. Morawiec (editors), Springer Netherlands, 2008, pp. 215-230.
L. Imbert, A. Peirera, A. Tisserand.
A Library for Prototyping the Computer Arithmetic Level in Elliptic Curve Cryptography, in: Proc. Advanced Signal Processing Algorithms, Architectures and Implementations XVII, San Diego, California, U.S.A., F. T. Luk (editor), SPIE, August 2007, vol. 6697, no 66970N, pp. 1–9.
B. Le Gal, E. Casseau, S. Huet.
Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level Synthesis, in: IEEE Transactions on Very Large Scale Integration Systems, November 2008, vol. 16, no 11, pp. 1454-1464.
K. Martin, C. Wolinski, K. Kuchcinski, A. Floch, F. Charot.
Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system, in: Proc. of the 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors, Boston, MA, USA, IEEE Computer Society, July 2009, pp. 145-152.
D. Menard, D. Chillet, O. Sentieys.
Floating-to-fixed-point Conversion for Digital Signal Processors, in: EURASIP Journal on Applied Signal Processing (JASP), Special Issue Design Methods for DSP Systems, 2006, vol. 2006, no 1, pp. 1–15.
D. Menard, O. Sentieys.
Automatic Evaluation of the Accuracy of Fixed-point Algorithms, in: IEEE/ACM Design, Automation and Test in Europe (DATE-02), Paris, March 2002.
S. Pillement, O. Sentieys, R. David.
DART: A Functional-Level Reconfigurable Architecture for High Energy Efficiency, in: EURASIP Journal on Embedded Systems (JES), 2008, pp. 1-13, Article ID 562326, 13 pages.
C. Plapous, C. Marro, P. Scalart.
Improved signal-to-noise ratio estimation for speech enhancement, in: IEEE Transactions on Speech and Audio Processing, 2006, vol. 14, no 6.
A. Tisserand.
High-Performance Hardware Operators for Polynomial Evaluation, in: Int. J. High Performance Systems Architecture, March 2007, vol. 1, no 1, pp. 14–23, invited paper.
C. Wolinski, K. Kuchcinski, E. Raffin.
Automatic Design of Application-Specific Reconfigurable Processor Extensions with UPaK Synthesis Kernel, in: ACM Transactions on Design Automation of Electronic Systems, 2009, vol. 15, no 1, pp. 1–36.
Publications of the year

Doctoral Dissertations and Habilitation Theses

M. M. Alam.
Techniques adaptatives pour la gestion de l'énergie dans les réseaux capteurs sans fil, Université Rennes 1, February 2013.
R. Bonamy.
Modélisation, Exploration et Estimation de la Consommation pour les Architectures Hétérogènes Reconfigurables Dynamiquement, Université Rennes 1 and Université Rennes 1, July 2013.
T. Chabrier.
Arithmetic recodings for ECC cryptoprocessors with protections against side-channel attacks, Université Rennes 1, June 2013.
C. Guy.
Facilités de typage pour l'ingénierie des langages, Université Rennes 1, December 2013.
A. Morvan.
Utilisation du modèle polyédrique pour la synthèse d'architectures pipelinées, École normale supérieure de Cachan - ENS Cachan, June 2013.
V. Tovinakere Dwarakanath.
Contrôleurs reconfigurables ultra-faible consommation pour les réseaux de capteurs sans fil, Université Rennes 1, February 2013.
H. Yviquel.
From dataflow-based video coding tools to dedicated embedded multi-core platforms, Université Rennes 1, October 2013.

Articles in International Peer-Reviewed Journals

R. Ben Atitallah, E. Senn, D. Chillet, M. Lanoe, D. Blouin.
An Efficient Framework for Power-Aware Design of Heterogeneous MPSoC, in: IEEE Transactions on Industrial Informatics, February 2013, vol. 9, no 1, pp. 487-501. [ DOI : 10.1109/TII.2012.2198657 ]
R. Bonamy, S. Bilavarn, D. Chillet, O. Sentieys.
Power Consumption Models for the Use of Dynamic and Partial Reconfiguration, in: Microprocessors and Microsystems, January 2014. [ DOI : 10.1016/j.micpro.2014.01.002 ]
M. Djendi, P. Scalart, A. Gilloire.
Analysis of Two-Sensors Forward BSS Structure With Post-Filters in The Presence of Coherent and Incoherent Noise, in: Speech Communication, 2013, vol. 55, pp. 975-987.
S. M. A. H. Jafri, S. Piestrak, O. Sentieys, S. Pillement.
Design of the coarse-grained reconfigurable architecture DART with on-line error detection, in: Microprocessors and Microsystems, December 2013, MICPRO 2101 p. [ DOI : 10.1016/j.micpro.2013.12.004 ]
A. Morvan, S. Derrien, P. Quinton.
Polyhedral Bubble Insertion: A Method to Improve Nested Loop Pipelining for High-Level Synthesis, in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, February 2013, vol. 32, no 3, pp. 339-352. [ DOI : 10.1109/TCAD.2012.2228270 ]
Q.-T. Ngo, O. Berder, P. Scalart.
General minimum Euclidean distance-based precoder for MIMO wireless systems, in: EURASIP Journal on Advances in Signal Processing, March 2013, pp. 1-12. [ DOI : 10.1186/1687-6180-2013-39 ]
T. H. Nguyen, F. Gomez Agis, L. Bramerie, M. Gay, J.-C. Simon, O. Sentieys.
Impact of Sampling-Source Extinction Ratio in Linear Optical Sampling, in: IEEE Photonics Technology Letters, April 2013, vol. 27, no 7, pp. 663-666. [ DOI : 10.1109/LPT.2013.2248353 ]
T. Stripf, O. Oey, T. Bruckschloegla, J. Becker, G. Rauwerda, K. Sunesen, G. Goulas, P. Alefragis, N. Voros, S. Derrien, O. Sentieys, N. Kavvadias, G. Dimitroulakos, K. Masselos, D. Kritharidis, N. Mitas, T. Perschke.
Compiling Scilab to high performance embedded multicore systems, in: Microprocessors and Microsystems, November 2013, vol. 37, no 8, pp. 1033-1049. [ DOI : 10.1016/j.micpro.2013.07.004 ]
Y. R. J. Thomas, M. Picot, A. Carer, O. Berder, O. Sentieys, F. Barrière.
A single sediment-Microbial Fuel Cell powering a wireless telecommunication system, in: Journal of Power Sources, November 2013, vol. 241, pp. 703-708. [ DOI : 10.1016/j.jpowsour.2013.05.016 ]
L.-Q.-V. Tran, O. Berder, O. Sentieys.
On the performance of distributed space-time coded cooperative relay networks based on inter-relay communications, in: EURASIP Journal on Wireless Communications and Networking, October 2013, vol. 1, pp. 1-15.
H. Yviquel, J. Boutellier, M. Raulet, E. Casseau.
Automated design of networks of Transport-Triggered Architecture processors using Dynamic Dataflow Programs, in: Signal Processing: Image Communication, September 2013, vol. 28, no 10, pp. 1295 - 1302. [ DOI : 10.1016/j.image.2013.08.013 ]

Articles in National Peer-Reviewed Journals

P. Cotret, G. Gogniat.
Protection des architectures hétérogènes sur FPGA : une approche par pare-feux matériels, in: Techniques de l'Ingenieur, February 2014, 10 p, Référence IN175.
J. C. Naud, D. Menard, O. Sentieys.
Évaluation de la précision en virgule fixe dans le cas des structures conditionnelles, in: Techniques et Sciences Informatiques, January 2013, vol. 32, no 2, pp. 179-201.

International Conferences with Proceedings

M. M. Alam, O. Berder, D. Menard, O. Sentieys.
On the Energy Savings of Adaptive Transmit Power for Wireless Sensor Networks Radio Transceivers, in: 26th International Conference on Architecture of Computing Systems (ARCS), Prague, Czech Republic, February 2013.
M. Alle, A. Morvan, S. Derrien.
Runtime dependency analysis for loop pipelining in High-Level Synthesis, in: 50th Design Automation Conference (DAC), Austin, United States, ACM, May 2013.
V. Bhatnagar, G. S. Ouedraogo, M. Gautier, A. Carer, O. Sentieys.
An FPGA Software Defined Radio Platform with a High-Level Synthesis Design Flow, in: IEEE International Vehicular Technology conference (VTC-Spring13), Germany, June 2013, 12 p.
K. Bigou, A. Tisserand.
Improving Modular Inversion in RNS using the Plus-Minus Method, in: CHES - 15th Workshop on Cryptographic Hardware and Embedded Systems - 2013, Santa Barbara, United States, G. Bertoni, J.-S. Coron (editors), Springer, May 2013, vol. 8086, pp. 233-249. [ DOI : 10.1007/978-3-642-40349-1_14 ]
F. Broekaert, A. Didioui, C. Bernier, O. Sentieys.
Back to Results Prototyping an Energy Harvesting Wireless Sensor Network Application Using HarvWSNet, in: Proceedings of 26th International Conference on Architecture of Computing Systems (ARCS), Prague, Czech Republic, 2013, pp. 1-6.
M. Catan, R. D. Cosmo, A. Eiche, T. A. Lascu, M. Lienhardt, J. Mauro, R. Treinen, S. Zacchiroli, G. Zavattaro, J. Zwolakowski.
Aeolus: Mastering the Complexity of Cloud Application Deployment, in: ESOCC - European Conference on Service-Oriented and Cloud Computing - 2013, Malaga, Spain, K.-K. Lau, W. Lamersdorf, E. Pimentel (editors), Lecture Notes in Computer Science, Springer, 2013, vol. 8135, pp. 1-3. [ DOI : 10.1007/978-3-642-40651-5_1 ]
T. Chabrier, A. Tisserand.
On-the-Fly Multi-Base Recoding for ECC Scalar Multiplication without Pre-Computations, in: ARITH - 21st IEEE International Symposium on Computer Arithmetic, Austin, TX, United States, IEEE, April 2013.
A. Chakhari, R. Rocher, P. Scalart.
Analytical approach to evaluate fixed point accuracy for an iteration of decision operators, in: 2013 International Conference on Computer Applications Technology (ICCAT), Sousse, Tunisia, January 2013, pp. 1-4. [ DOI : 10.1109/ICCAT.2013.6521964 ]
A. Didioui, C. Bernier, D. Morche, O. Sentieys.
HarvWSNet: A co-simulation framework for energy harvesting wireless sensor networks, in: International Conference on Computing, Networking and Communications (ICNC), San Diego, United States, 2013, pp. 808-812. [ DOI : 10.1109/ICCNC.2013.6504192 ]
A. Didioui, C. Bernier, D. Morche, O. Sentieys.
Power reconfigurable receiver model for energy-aware applications, in: IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS), Colombus, United States, 2013, pp. 800-803. [ DOI : 10.1109/MWSCAS.2013.6674770 ]
A. Floch, T. Yuki, A. El-Moussawi, A. Morvan, K. Martin, M. Naullet, M. Alle, L. L'Hours, N. Simon, S. Derrien, F. Charot, C. Wolinski, O. Sentieys.
GeCoS: A framework for prototyping custom hardware design flows, in: 13th IEEE International Working Conference on Source Code Analysis and Manipulation (SCAM), Eindhoven, Netherlands, B. Adams, J. Rilling, F. Khomh (editors), IEEE, September 2013, pp. 100-105. [ DOI : 10.1109/SCAM.2013.6648190 ]
M. Gautier, D. Noguet.
Signal detection using watermark insertion, in: IEEE International Vehicular Technology conference (VTC-Spring13), Dresden, France, June 2013, 11 p.
G. Goulas, C. Valouxis, P. Alefragis, N. Voros, O. Oey, T. Stripf, T. Bruckschlögl, J. Becker, C. Gogos, A. El-Moussawi, M. Naullet, T. Yuki.
Coarse-Grain Optimization and Code Generation for Embedded Multicore Systems, in: 16th Euromicro Conference on Digital System Design (DSD), Santander, Spain, September 2013, pp. 379-386. [ DOI : 10.1109/DSD.2013.48 ]
Q. H. Khuat, D. Chillet.
Communication Cost Reduction For Hardware Tasks Placed on Homogeneous Reconfigurable Resource, in: DASIP 2013, Design and Architectures for Signal and Image Processing, Cagliari, Italy, October 2013, pp. 265-270.
T.-N. Le, M. Magno, A. Pegatoquet, O. Berder, O. Sentieys, E. Popovici.
Ultra Low Power Asynchronous MAC Protocol using Wake-Up Radio for Energy Neutral Wireless Sensor Networks, in: 1st International Workshop on Energy-Neutral Sensing Systems (ENSsys) organized in conjunction with 11th ACM SenSys Conference, Rome, Italy, November 2013, Paper 10. [ DOI : 10.1145/2534208.2534221 ]
T.-N. Le, A. Pegatoquet, O. Berder, O. Sentieys.
Multi-Source Power Manager for Super-Capacitor based Energy Harvesting Wireless Sensor Networks, in: 1st International Workshop on Energy Neutral Sensing Systems (ENSSys) organized in conjunction with 11th ACM SenSys Conference, Rome, Italy, November 2013, Paper 19. [ DOI : 10.1145/2534208.2534227 ]
T.-N. Le, A. Pegatoquet, O. Sentieys, O. Berder, C. Belleudy.
Duty-Cycle Power Manager for Thermal-Powered Wireless Sensor Networks, in: 24th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, Londres, United Kingdom, September 2013, pp. 1645-1649. [ DOI : 10.1109/PIMRC.2013.6666406 ]
T.-N. Le, O. Sentieys, O. Berder, A. Pegatoquet, C. Belleudy.
Adaptive Filter for Energy Predictor in Energy Harvesting Wireless Sensor Networks, in: 26th IEEE International Conference on Architecture of Computing Systems (ARCS), 3rd Workshop on Ultra Low Power (WUPS), Prague, Czech Republic, February 2013, pp. 1-4.
D.-L. Nguyen, L.-Q.-V. Tran, O. Berder, O. Sentieys.
A Low-Latency and Energy-Efficient MAC Protocol for Cooperative Wireless Sensor Networks, in: Global Communications Conference (Globecom), Atlanta, United States, IEEE, December 2013.
H. Nguyen Viet, O. Berder, P. Scalart.
On the efficiency of sphere decoding for linearly precoded MIMO systems, in: Wireless Communications and Networking Conference (WCNC), Shanghai, China, IEEE, April 2013, pp. 4021-4025.
Best Paper
K. Parashar, D. Menard, O. Sentieys.
A Polynomial Time Algorithm for Solving the Word-length Optimization Problem, in: IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, United States, November 2013.
M. A. A. Pasha, S. Derrien, O. Sentieys.
Component-Level Datapath Merging in System-Level Design of Wireless Sensor Node Controllers for FPGA-Based Implementations, in: Euromicro Conference on Digital System Design (DSD), Santander, Spain, IEEE, September 2013, pp. 543-550. [ DOI : 10.1109/DSD.2013.64 ]
M. Sayed Hassan, A. El Falou, C. Langlais.
On the design of coded MIMO systems, in: ICCIT : the 3rd International Conference on Communications and Information Technology, Beyrouth, Lebanon, 2013, pp. 335-339.
P. Udupa, O. Sentieys, P. Scalart.
A Block-Parallel Architecture for Initial and Fine Synchronization in OFDM Systems, in: IEEE International Conference on Communications (ICC), Budapest, Hungary, 2013, pp. 4761-4765. [ DOI : 10.1109/ICC.2013.6655326 ]
P. Udupa, O. Sentieys, P. Scalart.
A Novel Hierarchical Low Complexity Synchronization Method for OFDM Systems, in: 2013 IEEE 77th Vehicular Technology Conference (VTC Spring), Dresden, Germany, 2013, pp. 1-5. [ DOI : 10.1109/VTCSpring.2013.6691838 ]
S. Wuliang, B. Combemale, S. Derrien, R. France.
Using Model Types to Support Contract-Aware Model Substitutability, in: 9th European Conference on Modelling Foundations and Applications (ECMFA 2013), Montpellier, France, P. Van Gorp, T. Ritter, L. Rose (editors), LNCS, Springer-Verlag Berlin Heidelberg, 2013, vol. 7949, pp. 118-133. [ DOI : 10.1007/978-3-642-39013-5_9 ]
C. Xiao, E. Casseau.
Improving High-Level Synthesis Effectiveness Through Custom Operator Identification, in: IEEE International Symposium on Circuits and Systems, Melbourne, Australia, June 2014.
T. Yuki, A. Morvan, S. Derrien.
Derivation of Efficient FSM from Loop Nests, in: International Conference on Field-Programmable Technology (ICFPT), Kyoto, Japan, IEEE, December 2013.
H. Yviquel, E. Casseau, M. Raulet, P. Jääskeläinen, J. Takala.
Towards run-time actor mapping of dynamic dataflow programs onto multi-core platforms, in: International Symposium on Image and Signal Processing and Analysis (ISPA), France, 2013, pp. 725 - 730.
H. Yviquel, A. Lorence, K. Jerbi, G. Cocherel, A. Sanchez, M. Raulet.
Orcc: multimedia development made easy, in: The 21st ACM International Conference on Multimedia, France, 2013, pp. 863-866.
R. Zhang, O. Berder, O. Sentieys.
Energy efficient reservation-based opportunistic MAC scheme in multi-hop networks, in: International Symposium on Personal Indoor and Mobile Radio Communications (PIMRC), London, United Kingdom, IEEE, September 2013, pp. 1660 - 1665. [ DOI : 10.1109/PIMRC.2013.6666409 ]

National Conferences with Proceedings

K. Bigou, T. Chabrier, A. Tisserand.
Opérateur matériel de tests de divisibilité par des petites constantes sur de très grands entiers, in: ComPAS'13 / SympA'15 - Symposium en Architectures nouvelles de machines, Grenoble, France, January 2013.
Q. H. Khuat, Q. H. Le, D. Chillet, A. Courtay, E. Casseau.
Ordonnancement Spatio-Temporel 3D minimisant le coût de communications entre tâches, in: XXIVe Colloque Gretsi - Traitement du Signal et des Images, Brest, France, September 2013, pp. 1-7.
Q. H. Khuat, Q. H. Le, D. Chillet, S. Pillement.
Ordonnancement spatio-temporel pour une architecture 3D composée d'une couche multiprocesseur et d'une couche ressource reconfigurables, in: Conférence d'informatique en Parallélisme, Architecture et Système, Grenoble, France, January 2013, ComPAS'2013.
G. S. Ouedraogo, M. Gautier, O. Sentieys.
Description haut niveau de formes d'ondes pour la radio logicielle sur architectures reconfigurables, in: XXIVe Colloque Gretsi - Traitement du Signal et des Images, Brest, France, September 2013.
O. Sentieys, M. A. A. Pasha, S. Derrien.
Architectures de contrôleurs ultra-faible consommation pour noeuds de réseau de capteurs sans fil, in: XXIVe Colloque Gretsi - Traitement du Signal et des Images, Brest, France, 2013, pp. 1-4.
P. Udupa, O. Sentieys, L. Bramerie.
Design and Implementation of DSP algorithms for 100 Gbps Coherent Optical-OFDM (CO-OFDM) Systems, in: XXIVe Colloque Gretsi - Traitement du Signal et des Images, Brest, France, 2013, pp. 1-4.

Conferences without Proceedings

C. Belleudy, T.-N. Le, A. Pegatoquet, O. Sentieys, O. Berder.
Energy Monitor for Super Capacitor based Wireless Sensor Networks, in: Colloque National du GDR SoC-SiP, Lyon, France, June 2013.
K. Bigou.
Avancées sur l'utilisation de la représentation RNS pour la cryptographie sur courbes elliptiques, in: CRYPTO'PUCES - 2013, Porquerolles, France, May 2013.
K. Bigou, A. Tisserand.
Crypto-processeur ECC en RNS sur FPGA avec inversion modulaire rapide, in: Colloque national du GDR SoC-SiP - 2013, Lyon, France, June 2013.
D. Chillet.
Sensibilisation à la modélisation SART pour le développement de code temps réel, in: CETSIS, l0ème Colloque sur l'Enseignement des. Technologies et des Sciences de l'Information et des Systèmes, Caen, France, March 2013.
C. Huriaux, O. Sentieys, A. Courtay.
An FPGA Configuration Stream Architecture Supporting Seamless Hardware Accelerator Migration, in: ConfigComp'2013, Workshop on Reconfigurable Computing V2.0: The Next Generation of Technology, Architectures and Design Tools, held in conjunction to the DATE 2013 conference, Grenoble, France, 2013.
Q. H. Khuat.
Communication Cost Reduction For Hardware Tasks Placed on Homogeneous Reconfigurable Resource, in: GDR SoC SiP, Lyon, France, June 2013.
G. S. Ouedraogo, M. Gautier, O. Sentieys.
Vers un language spécialisé pour la radio logicielle sur FPGA, in: Colloque national du GDR SoC-SiP, Lyon, France, June 2013, 2 p.

Scientific Books (or Scientific Book chapters)

O. Sentieys.
Efficacite energetique : les technologies de l'information, in: L'énergie à découvert, R. Mosseri, C. Jeandel (editors), CNRS Editions, 2013, pp. 229-231.

Books or Proceedings Editing

L. Lagadec, S. Pillement, A. Tisserand (editors)
Architecture des ordinateurs, Technique et science informatique, Hermes, February 2013, vol. 32, 150 p, Numéro spécial du Symposium en Architecture de Machines SympA'14.


M. Gautier, V. Berg.
Procede et dispositif de détection d'une sous-bande de fréquence dans une bande de fréquence et équipement de communication comprenant un tel dispositif, 2013, no FR20120054118 20120504.
M. Gautier, D. Noguet.
Method for Identifyng and Detecting a Radio Signal For a Cognitive Communication System, 2013, no US Patent, 20130251014.
References in notes
S. Hauck, A. DeHon (editors)
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation, Morgan Kaufmann, 2008.
Z. Alliance.
Zigbee specification, ZigBee Alliance, 2005, no ZigBee Document 053474r06, Version.
A. Bachir, M. Dohler, T. Watteyne, K. Leung.
MAC Essentials for Wireless Sensor Networks, in: Communications Surveys Tutorials, IEEE, quarter 2010, vol. 12, no 2, pp. 222 -248.
F. Barat, M. Jayapala, T. Vander Aa, R. Lauwereins, G. Deconinck, H. Corporaal.
Low Power Coarse-Grained Reconfigurable Instruction Set Processor, in: International Workshop on Field Programmable Logic and Applications, Lecture Notes in Computer Science, September 2003, pp. 230–239.
V. Baumgarte, G. Ehlers, F. May, A. Nückel, M. Vorbach, M. Weinhardt.
PACT XPP — A Self-Reconfigurable Data Processing Architecture, in: The Journal of Supercomputing, 2003, vol. 26, no 2, pp. 167–184.
C. Bobda.
Introduction to Reconfigurable Computing: Architectures Algorithms and Applications, Springer, 2007.
J. M. P. Cardoso, P. C. Diniz, M. Weinhardt.
Compiling for reconfigurable computing: A survey, in: ACM Comput. Surv., June 2010, vol. 42, 13:1 p.
D. Chillet, S. Pillement, O. Sentieys.
A Neural Network Model for Real-Time Scheduling on Heterogeneous SoC Architectures, in: IEEE International Joint Conference on Neural Networks, IJCNN'07, Orlando, FL, August, 12-17 2007.
M. Clark, M. Mulligan, D. Jackson, D. Linebarger.
Accelerating Fixed-Point Design for MB-OFDM UWB Systems, in: CommsDesign, 2005.
L. Collin, O. Berder, P. Rostaing, G. Burel.
Optimal minimum distance-based precoder for MIMO spatial multiplexing systems, in: IEEE Transactions on Signal Processing, 2004, vol. 52, no 3, pp. 617–627.
K. Compton, S. Hauck.
Reconfigurable computing: a survey of systems and software, in: ACM Comput. Surv., 2002, vol. 34, no 2, pp. 171–210.
G. Constantinides, P. Cheung, W. Luk.
Wordlength optimization for linear digital signal processing, in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, October 2003, vol. 22, no 10, pp. 1432- 1442.
M. Coors, H. Keding, O. Luthje, H. Meyr.
Fast Bit-True Simulation, in: Proc. ACM/IEEE Design Automation Conference (DAC), Las Vegas, june 2001, pp. 708-713.
S. Cui, A. Goldsmith, A. Bahai.
Energy-efficiency of MIMO and cooperative MIMO techniques in sensor networks, in: IEEE Journal on Selected Areas in Communications, 2004, vol. 22, no 6, pp. 1089–1098.
K. Danne, R. Muhlenbernd, M. Platzner.
Executing hardware tasks on dynamically reconfigurable devices under real-time conditions, in: International Conference on Field Programmable Logic and Applications, Lecture Notes in Computer Science, 2006.
R. David, S. Pillement, O. Sentieys.
Energy-Efficient Reconfigurable Processsors, in: Low Power Electronics Design, C. Piguet (editor), Computer Engineering, Vol 1, CRC Press, August 2004, chap. 20.
M. Dohler, E. Lefranc, H. Aghvami.
Space-time block codes for virtual antenna arrays, in: The 13th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, 2002, vol. 1.
A. Dunkels, B. Gronvall, T. Voigt.
Contiki-a lightweight and flexible operating system for tiny networked sensors, in: Proceedings of the First IEEE Workshop on Embedded Networked Sensors, 2004.
P. Faraboshi, G. Brown, J. Fisher, G. Desoli.
Lx: A technology Platform for Customizable VLIW Embedded Processing, in: ACM/IEEE Int. Symp. on Computer Architecture (ISCA 00), Vancouver, Canada, June 2000, pp. 203–213.
P. Garcia, K. Compton, M. Schulte, E. Blem, W. Fu.
An overview of reconfigurable hardware in embedded systems, in: EURASIP J. Embedded Syst., January 2006, vol. 2006, pp. 1–19.
S. Hauck, A. DeHon.
Reconfigurable computing: the theory and practice of FPGA-based computation, Series on Systems on Silicon, Morgan Kaufmann, 2008.
A. Hormati, M. Kudlur, S. Mahlke, D. Bacon, R. Rabbah.
Optimus: efficient realization of streaming applications on FPGAs, in: Proc. Int. Conf. on Compilers, Architecture, and Synthesis for Embedded Systems, New York, NY, USA, CASES'08, ACM, 2008, pp. 41–50.
S. Kim, W. Sung.
Word-length optimization for high level synthesis of digital signal processing systems, in: IEEE Workshop on Signal Processing Systems, Boston, October 1998, pp. 142-151.
K. Kum, J. Kang, W. Sung.
AUTOSCALER for C: An optimizing floating-point to integer C program converter for fixed-point digital signal processors, in: IEEE Transactions on Circuits and Systems II - Analog and Digital Signal Processing, September 2000, vol. 47, no 9, pp. 840-848.
J. Laneman, G. Wornell.
Distributed space-time-coded protocols for exploiting cooperative diversity in wireless networks, in: IEEE Transactions on Information Theory, 2003, vol. 49, no 10, pp. 2415–2425.
A. Lodi, M. Toma, F. Campi, A. Cappelli, R. Canegallo, R. Guerrieri.
A VLIW Processor With Reconfigurable Instruction Set for Embedded Applications, in: IEEE J. of Solid-State Circuits, 2003, vol. 38, no 11, pp. 1876–1886.
T. Marescaux, V. Nollet, J. Mignolet, A. Bartica, W. Moffata, P. Avasarea, P. Coenea, D. Verkest, S. Vernalde, R. Lauwereins.
Run-time support for heterogeneous multitasking on reconfigurable SoCs, in: Integration, the VLSI journal, 2004, vol. 38, pp. 107–130.
B. Mei, S. Vernalde, D. Verkest, H. De Man, R. Lauwereins.
ADRES: An architecture with tightly coupled VLIW processor and coarse-grained reconfigurable matrix, in: Proc. Int. Conf. on Field Programmable Logic and Applications, Springer, 2003, pp. 61–70.
D. Menard, D. Chillet, F. Charot, O. Sentieys.
Automatic Floating-point to Fixed-point Conversion for DSP Code Generation, in: IEEE/ACM Int. Conf. on Compilers, Architectures and Synthesis for Embedded Systems (CASES), Grenoble, October 2002.
H. Nikolov, M. Thompson, T. Stefanov, A. Pimentel, S. Polstra, R. Bose, C. Zissulescu, E. Deprettere.
Daedalus: toward composable multimedia MP-SoC design, in: Proc. Design Automation Conference, New York, NY, USA, DAC'08, ACM, 2008, pp. 574–579.
Y. Park, H. Park, S. Mahlke.
CGRA express: accelerating execution using dynamic operation fusion, in: Proc. Int. Conf. on Compilers, Architecture, and Synthesis for Embedded Systems, New York, NY, USA, CASES'09, ACM, 2009, pp. 271–280.
J. Rabaey.
Reconfigurable Processing: The Solution to Low-Power Programmable DSP, in: IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 1997, vol. 1, pp. 275–278.
R. Saleh, S. Wilton, S. Mirabbasi, A. Hu, M. Greenstreet, G. Lemieux, P. Pande, C. Grecu, A. Ivanov.
System-on-chip: reuse and integration, in: Proceedings of the IEEE, 2006, vol. 94, no 6, pp. 1050– 1069.
E. Salminen, A. Kulmala, T. D. Hamalainen.
Survey of Network-on-chip Proposals, in: White Paper, OCP-IP, 2008.
K. Seehyun, K. Kum, W. Sung.
Fixed-point optimization utility for C and C++ based digital signal processing programs, in: IEEE Transactions on Circuits and Systems II - Analog and Digital Signal Processing, nov 1998, vol. 45, no 11, pp. 1455 -1464.
G. Theodoridis, D. Soudris, S. Vassiliadis.
2, in: A survey of coarse-grain reconfigurable architectures and CAD tools, Springer Verlag, 2007.
Z. Ul-Abdin, B. Svensson.
Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing, in: Microprocessors and Microsystems, 2009, vol. 33, no 3, pp. 161 - 178. [ DOI : 10.1016/j.micpro.2008.10.003 ]
G. Venkataramani, W. Najjar, F. Kurdahi, N. Bagherzadeh, W. Bohm, J. Hammes.
Automatic compilation to a coarse-grained reconfigurable system-on-chip, in: ACM Trans. on Embedded Computing Systems, 2003, vol. 2, no 4, pp. 560–589.
C. Wolinski, M. Gokhale, K. McCave.
A polymorphous computing fabric, in: Micro, IEEE, 2002, vol. 22, no 5, pp. 56–68.
C. Wolinski, K. Kuchcinski, A. Postola.
UPaK: abstract unified pattern based synthesis kernel for hardware and software systems, in: University Booth, DATE 2007, Nice, France, May 2007.
Z. A. Ye, N. Shenoy, P. Baneijee.
A C compiler for a processor with a reconfigurable functional unit, in: Proc. ACM/SIGDA Int. Symp. on Field Programmable Gate-Arrays, FPGA, New York, NY, USA, ACM Press, 2000, pp. 95–100.