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Overall Objectives
Scientific Foundations
Application Domains
New Results
Contracts and Grants with Industry
Partnerships and Cooperations
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Section: Software


Logical Causality

Participants : Lacramioara Astefanoaei, Gregor Goessler [contact person] .

We have developed LoCa , a new prototype tool written in Scala that implements the analysis of logical causality described in  6.6.2 . LoCa currently supports causality analysis in Bip . The core analysis engine is implemented as an abstract class, such that support for other models of computation (MOC) can be added by instantiating the class with the basic operations of the MOC.

Automatic Controller Generation

Participants : Emil Dumitrescu, Alain Girault [contact person] .

We have developed a software tool chain to allow the specification of models, the controller synthesis, and the execution or simulation of the results. It is based on existing synchronous tools, and thus consists primarily in the use and integration of Sigali ( ) and Mode Automata ( ). It is the result of a collaboration with Eric Rutten from the Sardes team.

Useful component templates and relevant properties can be materialized, on one hand by libraries of task models, and, on the other hand, by properties and synthesis objectives.


Participant : Bertrand Jeannet.

Rapture ( ) [78] [53] is a verification tool that was developed jointly by BRICS (Denmark) and Inria in years 2000–2002. The tool is designed to verify reachability properties on Markov Decision Processes (MDP), also known as Probabilistic Transition Systems. This model can be viewed both as an extension to classical (finite-state) transition systems extended with probability distributions on successor states, or as an extension of Markov Chains with non-determinism. We have developed a simple automata language that allows the designer to describe a set of processes communicating over a set of channels à la CSP. Processes can also manipulate local and global variables of finite type. Probabilistic reachability properties are specified by defining two sets of initial and final states together with a probability bound. The originality of the tool is to provide two reduction techniques that limit the state space explosion problem: automatic abstraction and refinement algorithms, and the so-called essential states reduction.

The Interproc family of static analyzers

Participants : Bertrand Jeannet [contact person] , Pascal Sotin.

These analyzers and libraries are of general use for people working in the static analysis and abstract interpretation community, and serve as an experimental platform for the ANR project ASOPT (see § 8.1.2 ).

Fixpoint (http:// ):

a generic fix-point engine written in Ocaml . It allows the user to solve systems of fix-point equations on a lattice, using a parameterized strategy for the iteration order and the application of widening. It also implements recent techniques for improving the precision of analysis by alternating post-fixpoint computation with widening and descending iterations in a sound way [70] .

Interproc ( ):

a simple interprocedural static analyzer that infers properties on the numerical variables of programs in a toy language. It is aimed at demonstrating the use of the previous library and the above-described Apron library, and more generally at disseminating the knowledge in abstract interpretation. It is also deployed through a web-interface ( ). It is used as the experimental platform of the Asopt ANR project.


extends Interproc with concurrency, for the analysis of multithreaded programs interacting via shared global variables. It is also deployed through a web-interface ( ).


extends Interproc with pointers to local variables. It is also deployed through a web-interface ( ).


Participant : Gwenaël Delaval.

Heptagon is a dataflow synchronous language, inspired from Lucid Synchrone ( ). Its compiler is meant to be simple and modular, allowing this language to be a good support for the prototyping of compilation methods of synchronous languages. It is developped within the Synchronics Inria large-scale action.

Heptagon has been used to built BZR ( ), which is an extension of the former with contracts constructs. These contracts allow to express dynamic temporal properties on the inputs and outputs of Heptagon node. These properties are then enforced, within the compilation of a BZR program, by discrete controller synthesis, using the Sigali tool ( ). The synthesized controller is itself generated in Heptagon , allowing its analysis and compilation towards different target languages (C, Java , VHDL).