Section: Overall Objectives

Highlights

The team has organized the 21th IEEE International Conference on Application-specific Systems, Architectures and Processor (ASAP 2010) in Rennes. 121 submissions came from 31 countries in Africa, Asia, Europe, North America, Oceania, and South America while 32 long papers (26% acceptance rate) and 18 short papers (posters) were published. 76 participants attended ASAP'2010.

This year has seen the design and fabrication of a second integrated circuit prototype (Ochre: a circuit for On-Chip Randomness Extraction) including our architecture proposal for hybrid random number generator (RNG). The proposed architecture monitors the TRNG quality in real time to validate the RNG. Ochre aims at validating different RNG architectures and also their tolerance to non-invasive security attacks. See Section 6.3.7 .

Daniel Chillet, Sébastien Pillement and Arnaud Tisserand defended their "Habilitation à Diriger des Recherches (HDR)" thesis in 2010.

Erwan Raffin et al. received the Best Paper Award for their paper [69] E. Raffin, C. Wolinski, F. Charot, K. Kuchcinski, S. Guyetant, S. Chevobbe and E. Casseau, Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture in the Conference on Design and Architectures for Signal and Image Processing (DASIP), Edinburgh, UK, Oct. 2010.. This paper is one of the results disseminated from the ROMA ANR Project, coordinated by Cairn .

The article of Naeem Abbas, Steven Derrien, Sanaya Rajopadhye and Patrice Quinton (Accelerating HMMER on FPGA using Parallel Prefixes and Reductions) was selected as a best paper candidate (with 6 others papers out of 47) at the IEEE 2010 International Conference on Field-Programmable Technology (FPT'10) (acceptance rate of 47 out of 170).

The official FPL-Conference http://www.fpl.org benchmark-suite for FPGAs http://benchmarksuite.beyer-andreas.net/list is part of the FPL-Conference community. The main objective is to compose a set of "problems" in different categories, in order to permit rapid evaluation and comparisons between several approaches. In this context the DRAFT network and the related DRAGOON generator have been chosen to be included in this benchmark suite. Our IP belongs to the dynamic reconfiguration process tests and evaluations.