Section: New Results

Cryptographic Security of VHDL Designs

Participant : Jean Goubault-Larrecq.

Spurred by discussions with David Lubicz (DGA and U. Rennes I) and Nicolas Guillermin (DGA), we have made some first forays into algorithms that check the security of cryptographic hardware circuits, described in VHDL.

The aim is to help hardware designers in checking that the circuits they have designed do not leak any of some specifically marked sensitive locations. We currently check this in a suitable variant of the Dolev-Yao (symbolic) approach [22] . In particular, for now we do not consider computational proofs of security. We have not considered any hardware-specific attacks either (DPA, EMA, fault injection, physical attacks), and our version of VHDL is still a crude approximation of the real thing. However, the approach is simple enough to show good promise.

The current approach is reminiscent of the Goubault-Larrecq and Parrennes 2005 approach for analyzing cryptographic programs written in C, and proceeds by a translation to the decidable class . Although pointers are not a problem as in C, delays and asynchrony must be handled explicitly.