Section: Contracts and Grants with Industry
Sardes is a member of the CNRS research network GDR 725 ASR “Architecture, Système et Réseau”. See http://asr.cnrs.fr/ .
Project Flex-e-Ware (ANR)
Participants : Vivien Quéma, Renaud Lachaize, Alessio Pace.
The Flex-e-Ware project aims at defining software development tools and mechanisms dedicated to flexible, reconfigurable embedded systems. It aims to develop a common platform for the development of component-based embedded systems, based on the integration of the Fractal and Lightweight CCM component models.
The project partners are INRIA (Adam and Sardes project teams); CEA List; ENST, Paris; LIP6, Paris; France Telecom; Schneider Electric; STMicroelectronics; Teamlog; Trialog; Thales.
The project has run from January 2007 to December 2009.
Project Aravis (ANR-Minalogic)
Participants : Vivien Quéma, Renaud Lachaize, Fabien Gaud, Sylvain Genevès, Fabien Mottet.
The ARAVIS Project aims at addressing the challenges raised, both at the hardware and software levels, by the production of highly integrated multiprocessor systems on chip (MPSoCs) designed for demanding applications such as video encoding/decoding and software-defined radio communications. Due to the complexity of the manufacturing process, the latest generations of chips exhibit peculiar features that must be taken into account : (i) massively parrallel processing units, (ii) irregular behavior and aging of the processing units due to unavoidable defects of the manufacturing process. The ARAVIS project strives to provide a hardware and software platform suited to the adaptation requirements raised by the needs of such emerging hardware technologies and applications. The proposed approach encompasses three contributions: (i) a symmetric hardware architecture based on an asynchronous interconnect with integrated voltage/frequency scaling, (ii) a set of regulation algorithms based on control theory to optimize quality of service and energy consumption, (iii) a component-based runtime environment and related software tools to ease the dynamic management of applications and execution resources.
The project partners are STMicroelectronics, CEA-LETI, TIMA and INRIA (Necs and Sardes project teams). The project runs from October 2007 to September 2010.
Project MIND (ANR-Minalogic)
Participants : Eric Rutten, Jean-Bernard Stefani, Gwenael Delaval, Soufyane Aboubekr.
The MIND project aims at developping an industrial technology for component-based construction of embedded systems, based on the Fractal component model.
This includes the development of programming languages (extended C, ADL, IDL), a chain for compiling software architecture descriptions and generating code, and a graphical IDE integrated to Eclipse. In addition, the project aims to study extensions and refinements to the Fractal model suitable for dealing with non-functional aspects such as real-time and priority constraints, and its integration with the BIP component model developed at the Verimag laboratory.
The project partners include STMicroelectronics, CEA, INRIA (Adam and Sardes prokect teams), Schneider. The project runs from October 2008 to October 2010.