Section: New Results

Weak Memory Models

Participants : Jade Alglave, Luc Maranget, Giulio Manzonetto, Peter Sewell [ U. of Cambridge ] , Susmit Sekar [ U. of Cambridge ] , Francesco Zappa Nardelli.

Multiprocessors are now dominant, but real multiprocessors do not provide the sequentially consistent memory that is assumed by most work on semantics and verification. Instead, they have subtle relaxed (or weak) memory models, usually described only in ambiguous prose, leading to widespread confusion.

We developed rigourous and accurate semantics for multiprocessor programs above three architectures: x86, Power, and ARM. Each covers the relaxed memory model, instruction semantics, and instruction decoding, for fragments of the instruction sets, and is mechanised in HOL or Coq.

• J. Alglave and L. Maranget concentrated on the weak memory model of the Power PC architecture. They designed a generic model, which conservatively extends the models of the Sparc hierarchy (TSO/PSO/RMO). Moreover, the expression of the validity condition in these new models is much simpler and more prone to efficient implementation than the original one. Additionnaly, in spite of its conceptual simplicity and of being global-time based, our experiments demonstrate that this generic model yields valid insights on the Power architecture.

  Our experimentats on Power5 lead to some contact with IBM. We pursue an informal collaboration with IBM, based upon weekly telephone conferences with a chief IBM engineer.

  This work is now under publication.

• G. Manzonetto, P. Sewell and F. Zappa Nardelli also began the investigation of equivalences of programs running on top of relaxed memories, but this line of research is still at an early stage.

  A position paper[17] has been presented in the workshop EC² .

  Web page of the project: http://moscova.inria.fr/~zappa/projects/weakmemory .

This work is also done in collaboration with Scott Owens, Tom Ridge, Mark Batty (Cambridge University), and Samin Isthiaq (Microsoft Research Cambridge), Jaroslav Ševčík (Edinburgh University) and Derek Williams (IBM).