Bibliography

Major publications by the team in recent years

[1]

B. Bérard, L. Fribourg, F. Klay, J.-F. Monin.
A compared study of two correctness proofs for the standardized algorithm of ABR conformance, in: Formal Methods in System Design, january 2003.

[2]

F. Blanqui.
Definitions by rewriting in the Calculus of Constructions, in: Mathematical Structures in Computer Science, 2005, vol. 15, n^o 1, p. 37-92.

[3]

F. Blanqui.
Inductive types in the Calculus of Algebraic Constructions, in: Fundamenta Informaticae, 2005, vol. 65, n^o 1-2, p. 61-86.

[4]

F. Blanqui, J.-P. Jouannaud, P.-Y. Strub.
From Formal Proofs to Mathematical Proofs: A Safe, Incremental Way for Building in First-order Decision Procedures, in: Proceedings of the 5th International Conference on Theoretical Computer Science, International Federation for Information Processing 273, 2008.

[5]

B. Delsart, V. Joloboff, E. Paire.
JCOD: A Lightweight Modular Compilation Technology for Embedded Java, in: Second International Conference on Embedded Software, Lecture Notes in Computer Science, Springer-Verlag, 2002, vol. 2491, p. 197–212, ISBN 3-540-44307-X.

[6]

F. He, X. Song, M. Gu, J. Sun.
Heuristic-Guided Abstraction Refinement, in: Computer Journal, May 2009, vol. 52, n^o 3, p. 280-287.

[7]

C. Helmstetter, F. Maraninchi, L. Maillet-Contoz.
Test Coverage for Loose Timing Annotations, in: 11th International Workshop on Formal Methods for Industrial Critical Systems, Springer-Verlag, August 2006.

[8]

C. Jard, J.-F. Monin, R. Groz.
Development of Veda, a Prototyping Tool for Distributed Algorithms, in: IEEE Transactions on Software Engineering, march 1988, vol. 14, n^o 3, p. 339–352.

[9]

J.-P. Jouannaud, A. Rubio.
Higher-Order Orderings for Normal Rewriting, in: Rewriting Techniques and Applications, Lectures Notes in Computer Science, Springer-Verlag, 2006, vol. 4098, p. 387–399.

[10]

J.-P. Jouannaud, A. Rubio.
Polymorphic Higher-Order Recursive Path Orderings, in: Journal of the ACM, 2007, vol. 54, n^o 1, p. 1-48.

[11]

Y.-K. Tsay, B.-Y. Wang.
Automated Compositional Reasoning of Intuitionistically Closed Regular Properties, in: International Journal on Foundation of Computer Science, 2009, vol. 20, n^o 4, p. 747-762.

Publications of the year

Articles in International Peer-Reviewed Journal

[12]

K. Kusakari, Y. Isogai, M. Sakai, F. Blanqui.
Static Dependency Pair Method based on Strong Computability for Higher-Order Rewrite Systems, in: IEICE Transactions on Information and Systems, 2009
http://hal.inria.fr/inria-00397820/en/.

International Peer-Reviewed Conference/Proceedings

[13]

F. Blanqui, C. Roux.
On the relation between sized-types based termination and semantic labelling, in: 18th EACSL Annual Conference on Computer Science Logic - CSL 09, Portugal Coimbra, 2009
http://hal.inria.fr/inria-00397689/en/.

[14]

V. Joloboff, C. Helmstetter, H. Xiao.
SimSoC: A full system simulation software for embedded systems, in: 2009 International Workshop on Open-source Software for Scientific Computation (OSSC-2009), Chine Guiyang, IEEE (editor), LIAMA, Institute of Automation, CAS, Beijing, China Guizhou Normal University, China, 2009-09-20
http://hal.inria.fr/inria-00435247/en/, ossc2009.

[15]

J.-P. Jouannaud, V. Van Oostrom.
Diagrammatic Confluence and Completion, in: International Conference in Automata, Languages and Programming, Grèce Rhodes, W. Thomas (editor), Springer Berlin/Heidelberg, Paul Spirakis, 2009-07-06, vol. 2
http://hal.inria.fr/inria-00436070/en/.

[16]

H. Zhu, F. He, W. N. N. Hung, X. Song, M. Gu.
Data Mining Based Decomposition for Assume-Guarantee Reasoning, in: FMCAD, Austin, Texas, 2009.

Internal Reports

[17]

F. Blanqui, A. Koprowski.
Automated Verification of Termination Certificates, INRIA, 2009
http://hal.inria.fr/inria-00390902/en/, RR-6949.

[18]

L. Yin, F. He, W. N. N. Hung, X. Song, M. Gu.
Maxterm Covering for Satisfiability, Tsinghua University, 2009, Technical report.

Other Publications

[19]

A. Mahboubi, P.-Y. Strub.
A Formalization of the simplex algorithm theory, 2009, Draft.

[20]

A. Mahboubi, P.-Y. Strub.
Efficient certificates for linear arithmetic problems, 2009, Draft.

[21]

P.-Y. Strub.
Coq Modulo Theory: an implementation of the Calculus of Inductive Congruent Constructions, 2009, Draft.

References in notes

[22]

F. Ghenassia (editor)
Transaction-Level Modeling with SystemC. TLM Concepts and Applications for Embedded Systems, Springer, June 2005, ISBN 0-387-26232-6.

[23]

D. Angluin, J. Aspnes, M. J. Fischer, H. Jiang.
Self-stabilizing population protocols, in: Proceedings of the 9th International Conference on Principles of Distributed Systems, Lecture Notes in Computer Science, Springer, 2005, vol. 3974, p. 103-117.

[24]

F. Bellard.
QEMU, A Fast And Portable Dynamic Translator, in: USENIX Annual Technical Conference, Philadelphia, PA, USA, 2005.

[25]

F. Blanqui, J.-P. Jouannaud, A. Rubio.
The Higher-Order Computability Path Ordering: the end of a Quest, in: Proceedings of the 22nd International Conference on Computer Science Logic, Lecture Notes in Computer Science 5213, 2008, Invited paper.

[26]

F. Blanqui, J.-P. Jouannaud, P.-Y. Strub.
From Formal Proofs to Mathematical Proofs: A Safe, Incremental Way for Building in First-order Decision Procedures, in: Proceedings of the 5th International Conference on Theoretical Computer Science, International Federation for Information Processing 273, 2008.

[27]

M. Bozga, P. Habermehl, R. Iosif, F. Konecný, T. Vojnar.
Automatic Verification of Integer Array Programs, in: CAV, 2009, p. 157-172.

[28]

D. Burger, T. M. Austin.
The SimpleScalar tool set, version 2.0, in: SIGARCH Comput. Archit. News, 1997, vol. 25, n^o 3, p. 13–25
http://doi.acm.org/10.1145/268806.268810.

[29]

L. Cai, D. Gajski.
Transaction level modeling: an overview, in: CODES+ISSS '03: Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, New York, NY, USA, ACM Press, 2003, p. 19–24
http://doi.acm.org/10.1145/944645.944651.

[30]

B. Cmelik, D. Keppel.
Shade: a fast instruction-set simulator for execution profiling, in: SIGMETRICS Perform. Eval. Rev., 1994, vol. 22, n^o 1, p. 128–137
http://doi.acm.org/10.1145/183019.183032.

[31]

Coq Development Team.
The Coq Reference Manual, Version 8.2, INRIA Rocquencourt, France, 2008
http://coq.inria.fr/.

[32]

J. D'Errico, W. Qin.
Constructing portable compiled instruction-set simulators: an ADL-driven approach, in: DATE '06: Proceedings of the conference on Design, automation and test in Europe, 3001 Leuven, Belgium, Belgium, European Design and Automation Association, 2006, p. 112–117.

[33]

F. Fummi, G. Perbellini, M. Loghi, M. Poncino.
ISS-centric modular HW/SW co-simulation., in: ACM Great Lakes Symposium on VLSI, 2006, p. 31-36.

[34]

A. Gavare.
GXemul Documentation, 2007
http://gavare.se/gxemul/gxemul-stable/doc/index.html.

[35]

P. Gerin, S. Yoo, G. Nicolescu, A. A. Jerraya.
Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures, in: ASP-DAC '01: Asia South Pacific Design Automation Conference, ACM, 2001, p. 63–68.

[36]

D. Giannakopoulou, C. S. Pasareanu.
Special issue on learning techniques for compositional reasoning, in: Formal Methods in System Design, 2008, vol. 32, n^o 3, p. 173-174.

[37]

J. Giesl, S. Swiderski, P. Schneider-Kamp, R. Thiemann.
Automated Termination Analysis for Haskell: From Term Rewriting to Programming Languages, in: Proceedings of the 17th International Conference on Rewriting Techniques and Applications, Lecture Notes in Computer Science 4098, 2006.

[38]

IEEE.
IEEE Standard 1666 - SystemC Language Reference Manual, IEEE, 2006, Technical report.

[39]

J.-P. Jouannaud, F. V. Raamsdonk.
Confluence Properties of Terminating Higher-Order Rewrite Relations, in: Mathematical Theories of Abstraction, substitution and naming in Computer Science, ICMS, may 2007.

[40]

X. Leroy, D. Doligez, J. Garrigue, D. Rémy, J. Vouillon.
The Objective Caml system release 3.11, Documentation and user's manual, INRIA, France, 2008
http://caml.inria.fr/.

[41]

X. Leroy.
A formally verified compiler back-end, in: Journal of Automated Reasoning, 2009, vol. 43, n^o 4, p. 363-446.

[42]

M. Meerwein, C. Baumgartner, T. Wieja, W. Glauert.
Embedded systems verification with FGPA-enhanced in-circuit emulator, in: ISSS '00: Proceedings of the 13th international symposium on System synthesis, Washington, DC, USA, IEEE Computer Society, 2000, p. 143–148
http://doi.acm.org/10.1145/501790.501821.

[43]

S. Microelectronics.
TAC: Transaction Accurate Communication/Channel, 2006
http://www.greensocs.com/TACPackage.

[44]

M. Moy, F. Maraninchi, L. Maillet-Contoz.
LusSy: A Toolbox for the Analysis of Systems-on-a-Chip at the Transactional Level, in: International Conference on Application of Concurrency to System Design, June 2005.

[45]

M. Moy, F. Maraninchi, L. Maillet-Contoz.
Pinapa: An Extraction Tool for SystemC descriptions of Systems-on-a-Chip, in: EMSOFT, September 2005
http://www-verimag.imag.fr/~moy/publications/sc-compil.pdf.

[46]

A. Nohl, G. Braun, O. Schliebusch, R. Leupers, H. Meyr, A. Hoffmann.
A universal technique for fast and flexible instruction-set architecture simulation, in: DAC '02: Proceedings of the 39th conference on Design automation, New York, NY, USA, ACM, 2002, p. 22–27
http://doi.acm.org/10.1145/513918.513927.

[47]

Open SystemC Initiative (OSCI).
SystemC TLM Library, 2007
http://www.systemc.org.

[48]

M. Poncino, J. Zhu.
DynamoSim: a trace-based dynamically compiled instruction set simulator, in: ICCAD '04: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, Washington, DC, USA, IEEE Computer Society, 2004, p. 131–136
http://dx.doi.org/10.1109/ICCAD.2004.1382557.

[49]

M. Reshadi, P. Mishra, N. Dutt.
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation, in: DAC '03: Proceedings of the 40th conference on Design automation, New York, NY, USA, ACM, 2003, p. 758–763
http://doi.acm.org/10.1145/775832.776026.

[50]

P. Schaumont, D. Ching, I. Verbauwhede.
An interactive codesign environment for domain-specific coprocessors, in: ACM Trans. Des. Autom. Electron. Syst., 2006, vol. 11, n^o 1, p. 70–87
http://doi.acm.org/10.1145/1124713.1124719.

[51]

P.-Y. Strub.
Type Theory and Decision Procedures, École Polytechnique, July 2008, Ph. D. Thesis.

[52]

E. Viaud, F. Pêcheux, A. Greiner.
An efficient TLM/T modeling and simulation environment based on conservative parallel discrete event principles, in: DATE '06: Proceedings of the conference on Design, automation and test in Europe, 3001 Leuven, Belgium, Belgium, European Design and Automation Association, 2006, p. 94–99.

[53]

H. Zantema.
Termination of Term Rewriting by Semantic Labelling, in: Fundamenta Informaticae, 1995, vol. 24, p. 89-105.

[54]

H. Zhu, F. He, W. N. N. Hung, X. Song, M. Gu.
Data Mining Based Decomposition for Assume-Guarantee Reasoning, in: FMCAD, Austin, Texas, 2009.