Inria / Raweb 2009
Presentation of the Project espresso

Bibliography

Major publications by the team in recent years

[1]: B. Bouyssounouse, J. Sifakis (editors)
Embedded Systems Design. The ARTIST Roadmap for Research and Development, Springer, Lecture Notes in Computer Science, Vol. 3436, 2005, Thierry Gautier, contributor.
[2]: A. Gamatié (editor)
Designing Embedded Systems with the SIGNAL Programming Language, Springer, 2009
http://www.springer.com/engineering/circuits+%26+systems/book/978-1-4419-0940-4.
[3]: T. P. Amagbegnon, L. Besnard, P. Le Guernic.
Implementation of the Data-flow Synchronous Language Signal, in: Proceedings of the ACM Symposium on Programming Languages Design and Implementation (PLDI'95), ACM, 1995, p. 163–173.
[4]: A. Benveniste, B. Caillaud, P. Le Guernic.
From synchrony to asynchrony, in: CONCUR'99, Concurrency Theory, 10th International Conference, J. C. M. Baeten, S. Mauw (editors), Lecture Notes in Computer Science, Springer, August 1999, vol. 1664, p. 162–177.
[5]: A. Benveniste, P. Caspi, S. Edwards, N. Halbwachs, P. Le Guernic, R. de Simone.
The Synchronous Languages Twelve Years Later, in: Proceedings of the IEEE Special issue on Modeling and Design of Embedded Systems, 2003, vol. 91(1).
[6]: A. Benveniste, P. Le Guernic, C. Jacquemot.
Synchronous programming with events and relations: the Signal language and its semantics, in: Science of Computer Programming, 1991, vol. 16, p. 103-149.
[7]: A. Gamatié, T. Gautier.
Synchronous Modeling of Avionics Applications using the SIGNAL Language, in: Proceedings of the 9th IEEE Real-time/Embedded technology and Applications symposium (RTAS'03), Washington D.C., USA, IEEE Press, May 2003.
[8]: A. Gamatié, T. Gautier, P. Le Guernic, J.-P. Talpin.
Polychronous Design of Embedded Real-Time Applications, in: ACM Transactions on Software Engineering and Methodology (TOSEM), 2006.
[9]: A. Gamatié, T. Gautier, P. Le Guernic, J.-P. Talpin.
Polychronous Design of Embedded Real-Time Applications, in: ACM Transactions on Software Engineering and Methodology (TOSEM), 2007.
[10]: T. Gautier, P. Le Guernic.
Code generation in the SACRES project, in: Towards System Safety, Proceedings of the Safety-critical Systems Symposium, SSS'99, Huntingdon, UK, F. Redmill, T. Anderson (editors), Springer, February 1999, p. 127–149.
[11]: A. Kountouris, C. Wolinski.
High-level Pre-synthesis Optimization Steps using Hierarchical Conditional Dependency Graphs, in: Proceedings of the EUROMICRO'99, Milan, Italie, IEEE Computer Society Press, August 1999.
[12]: P. Le Guernic, T. Gautier.
Data-Flow to von Neumann: the Signal approach, in: Advanced Topics in Data-Flow Computing, J. L. Gaudiot, L. Bic (editors), 1991, p. 413–438.
[13]: P. Le Guernic, T. Gautier, M. Le Borgne, C. Le Maire.
Programming Real-Time Applications with Signal, in: Proceedings of the IEEE, Septembre 1991, vol. 79, n^o 9, p. 1321–1336.
[14]: P. Le Guernic, J.-P. Talpin, J.-C. Le Lann.
Polychrony for system design, in: Journal of Circuits, Systems and Computers, Special Issue on Application Specific Hardware Design, 2003.
[15]: H. Marchand, P. Bournai, M. Le Borgne, P. Le Guernic.
Synthesis of Discrete-Event Controllers based on the Signal Environment, in: Discrete Event Dynamic System: Theory and Applications, October 2000, vol. 10, n^o 4, p. 347–368.
[16]: J.-P. Talpin, P. Le Guernic.
An algebraic theory for behavioral modeling and protocol synthesis in system design, in: Formal Methods in System Design, 2006.

Publications of the year

Doctoral Dissertations and Habilitation Theses

[17]: Y. Glouche.
Une méthodologie de spécification et de validation de systèmes hétérogènes fondée sur un modèle de contrats pour la conception des systèmes embarqués, Université de Rennes 1, 2009, Ph. D. Thesis.

Articles in International Peer-Reviewed Journal

[18]: S. Ahuja, S. Gurumani, C. Spackman, S. Shukla.
Hardware Coprocessor Synthesis from an ANSI C Specification, in: IEEE Design and Test of Computers, 2009
http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5209963&isnumber=5209950.
[19]: C. Brunette, J.-P. Talpin, A. Gamatié, T. Gautier.
A metamodel for the design of polychronous systems, in: Journal of Logic and Algebraic Programming, April 2009, vol. 78, n^o 4, p. 233–259
http://dx.doi.org/10.1016/j.jlap.2008.11.005.
[20]: A. Gamatié, T. Gautier.
The Signal Synchronous Multi-Clock Approach to the Design of Distributed Embedded Systems, in: IEEE Transactions on Parallel and Distributed Systems, 2009
http://doi.ieeecomputersociety.org/10.1109/TPDS.2009.125.
[21]: A. Sangiovanni-Vincentelli, G. Yang, S. Shukla, A. Mathaikutty, J. Sztipanovits.
Metamodeling: An Emerging Representation Paradigm for System-Level Design, in: IEEE Design and Test of Computers, 2009
http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5167508&isnumber=5167496.
[22]: S. Shukla.
Model-Driven Engineering and Safety-Critical Embedded Software, in: IEEE Computer, 2009
http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5233515&isnumber=5233491.
[23]: S. Suhaib, A. Mathaikutty, S. Shukla.
A Trace-Based Framework for Verifiable GALS Composition of IPs, in: IEEE Transactions on Very Large Scale Integration Systems, 2009
http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=4599241&isnumber=4603036.

International Peer-Reviewed Conference/Proceedings

[24]: S. Ahuja, A. Mathaikutty, G. Singh, J. Stetzer, S. Shukla, A. Dingankar.
Power estimation methodology for a high-level synthesis framework, in: Quality of Electronic Design, ISQED, 2009
http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=4810352&isnumber=4810250.
[25]: L. Besnard, T. Gautier, M. Moy, J.-P. Talpin, K. Johnson, F. Maraninchi.
Automatic translation of C/C++ parallel code into synchronous formalism using an SSA intermediate form, in: Automated Verification of Critical Systems, EASST, 2009.
[26]: A. Cortier, L. Besnard, J.-P. Bodeveix, J. Buisson, F. Dagnat, M. Filali, G. Garcia, T. Gautier, J. Ouy, M. Pantel, A. Rugina, M. Strecker, J.-P. Talpin.
Synoptic: a Domain Specific Modeling Language for embedded flight-software (extended abstract), in: Formal Methods for Aerospace, Elsevier, November 2009, p. 76–78.
[27]: E. Daylight, S. Shukla.
On the Difficulty of Concurrent-System-Design, Illustrated with a 2x2 Switch Case Study, in: International Symposium on Formal Methods, Springer, 2009.
[28]: E. Daylight, S. Shukla, D. Sergio.
Expressing the Behavior of Three Very Different Concurrent Systems by Using Natural Extensions of Separation Logic, in: International Workshop on Expressiveness in Concurrency, Elsevier, 2009.
[29]: Y. Glouche, P. L. Guernic, J.-P. Talpin, T. Gautier.
A Boolean algebra of contracts for assume-guarantee reasoning, in: Formal Aspects of Component Software, Elsevier, 2009.
[30]: Y. Glouche, P. L. Guernic, J.-P. Talpin, T. Gautier.
A module language for typing by contracts, in: NASA Formal Methods Symposium, Springer, 2009.
[31]: B. Jose, B. Xue, S. Shukla.
An Analysis of the Composition of Synchronous Systems, in: International Workshop on the Application of Formal Methods for Globally Asynchronous and Locally Synchronous Design, Elsevier, 2009
http://www.sciencedirect.com/science/article/B75H1-4WXBHBT-6/2/a42f939f6e228137c747dc6d22d44388.
[32]: Y. Ma, J.-P. Talpin, S. Shukla, T. Gautier.
Distributed simulation of AADL specifications in a polychronous model of computation, in: International Conference on Embedded Software and Systems, IEEE Press, 2009.
[33]: V. Mahé, F. Jouault, H. Brunelière.
Megamodeling Software Platforms: Automated Discovery of Usable Cartography from Available Metadata, in: Reverse Engineering Models from Software Artifacts, IEEE, 2009.
[34]: J. Peralta, T. Gautier.
Towards SMV model checking of Signal (multi-clocked) Specifications, in: Automated Verification of Critical Systems, EASST, 2009.
[35]: D. Potop-Butucaru, R. D. Simone, Y. Sorel, J.-P. Talpin.
Clock-driven distributed real-time implementation of endochronous synchronous programs, in: Embedded Software Conference, ACM Press, 2009.
[36]: D. Potop-Butucaru, R. D. Simone, Y. Sorel, J.-P. Talpin.
From Concurrent Multiclock Programs to Deterministic Asynchronous Implementations, in: Application of Concurrency to System Design, IEEE Press, 2009.
[37]: S. Suhaib, B. Jose, S. Shukla, A. Mathaikutty.
Formal transformation of a KPN specification to a GALS implementation," Specification, in: Forum on Design Languages, IEEE, 2009
http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=4641426&isnumber=4641405.
[38]: E. Vecchie, J.-P. Talpin, K. Schneider.
Separate compilation and execution of imperative synchronous modules, in: Design Analysis and Test in Europe, IEEE Press, 2009.
[39]: B. Xue, S. Shukla.
Modeling and Analyzing the Implementation of Latency-Insensitive Protocols Using the Polychrony Framework, in: International Workshop on the Application of Formal Methods for Globally Asynchronous and Locally Synchronous Design, Elsevier, 2009
http://www.sciencedirect.com/science/article/B75H1-4WXBHBT-2/2/77a33e1d0047fb19a1306fcf23338ddb.

National Peer-Reviewed Conference/Proceedings

[40]: C. André, A. Belaunde, B. Berthomieu, C. Brunette, A. Canals, H. Garavel, S. Graf, F. Lang, V. Mahé, M. Nakhlé, R. Schnekenburger, R. de Simone, J.-P. Talpin, F. Vernadat.
Présentation des résultats du projet OpenEmbeDD, in: Neptune, France Paris, P. Bazex, A. Canals, T. Millan (editors), Revue Génie Logiciel - AFCET, 2009
http://hal.inria.fr/inria-00381639/en/.

Scientific Books (or Scientific Book chapters)

[41]: B. Jose, S. Shukla, J.-P. Talpin.
Programming models for multi-core embedded systems, Taylor and Francis, 2009.
[42]: D. Potop-Butucaru, R. D. Simone, J.-P. Talpin.
The synchronous hypothesis and polychronous languages, CRC Press, 2009.

Internal Reports

[43]: L. Besnard, T. Gautier, M. Moy, J.-P. Talpin, K. Johnson, F. Maraninchi.
Automatic translation of C/C++ parallel code into synchronous formalism using an SSA intermediate form, INRIA, 2009
http://hal.inria.fr/inria-00400272/en/, RR-6976.
[44]: L. Besnard, T. Gautier, J.-P. Talpin.
Code generation strategies in the Polychrony environment, INRIA, 2009
http://hal.inria.fr/inria-00372412/en/, RR-6894.
[45]: J.-P. Talpin, J. Ouy, T. Gautier, L. Besnard, A. Cortier.
Modular interpretation of heterogeneous modeling diagrams into synchronous equations using static single assignment, INRIA, 2009
http://hal.inria.fr/inria-00417682/en/, RR-7036.

References in notes

[46]: OpenEmbeDD website, 2009
http://openembedd.org.
[47]: Polychrony Update Site for Eclipse plug-ins, 2009
http://www.irisa.fr/espresso/Polychrony/update/.
[48]: TopCased website, 2009
http://www.topcased.org.
[49]: INRIA AOSTE team (editor)
TimeSquare, 2009
http://www-sop.inria.fr/aoste/dev/time_square/.
[50]: Airlines Electronic Engineering Committee.
ARINC Report 651-1: Design Guidance for Integrated Modular Avionics, Aeronautical radio, Inc., Annapolis, Maryland, 1997, Technical report.
[51]: Airlines Electronic Engineering Committee.
ARINC Specification 653: Avionics Application Software Standard Interface, Aeronautical radio, Inc., Annapolis, Maryland, 1997, Technical report.
[52]: C. André, F. Mallet, R. De Simone.
Modeling Time(s), in: ACM/IEEE Int. Conf. on Model Driven Engineering Languages and Systems (MoDELS/UML'07), TN, USA, LNCS 4735, Springer, October 2007, p. 559–573.
[53]: A. Benveniste, P. Caspi, L. Carloni, A. Sangiovanni-Vincentelli.
Heterogeneous Reactive Systems Modeling and Correct-by-Construction Deployment, in: Embedded Software Conference (EMSOFT'03), Springer Verlag, 2003.
[54]: B. Berthomieu, P.-O. Ribet, F. Vernadat.
The tool TINA - construction of abstract state spaces for Petri Nets and Time Petri Nets, in: International Journal of Production Research, 2004, vol. 42, n^o 14.
[55]: L. Besnard, T. Gautier, P. Le Guernic.
SIGNAL V4-INRIA version: Reference Manual, 2009
http://www.irisa.fr/espresso/Polychrony.
[56]: J. Buck, S. Ha, E. A. Lee, D. G. Messerschmitt.
Ptolemy: A Framework for Simulating and Prototyping Heterogenous Systems, in: Int. Journal in Computer Simulation, 1994, vol. 4, n^o 2, p. 155-182.
[57]: J.-L. Colaco, B. Pagano, M. Pouzet.
A conservative extension of synchronous data-flow with state machines, in: In Embedded Software Conference., ACM Press, 2005.
[58]: H. Garavel, F. Lang, R. Mateescu, W. Serwe.
CADP 2006: A Toolbox for the construction and Analisys of Distributed Processes, in: Proceedings of the 19th International Conference on Computer Aided Verification, Springer LNCS, 2007, vol. 4590.
[59]: T. Gautier, P. Le Guernic, J.-P. Talpin.
Polychronous Design of Real-Time Applications with SIGNAL, in: ARTIST Survey of Programming Languages, A. Burns (editor), 2008
http://www.artist-embedded.org/artist/ARTIST-Survey-of-Programming.html.
[60]: K. L. McMillan.
Symbolic Model Checking: An approach to the state explosion problem, Carnegie Mellon University, May 1992, Ph. D. Thesis.
[61]: Object Management Group (OMG).
Modeling and Analysis of Real-time and Embedded systems (MARTE), Beta 2, June 2008
http://www.omgmarte.org/Documents/Specifications/08-06-09.pdf.
[62]: E. Rutten, F. Martinez.
Signal GTI: implementing task preemption and time intervals in the synchronous data flow language Signal, in: Proceedings of the 7th Euromicro Workshop on Real-Time Systems, Odense, Denmark, IEEE Publ., june 1995.
[63]: J.-P. Talpin, C. Brunette, T. Gautier, A. Gamatié.
Polychronous mode automata, in: Embedded Software Conference, ACM Press, September 2006.
[64]: F. Vernadat, C. Percebois, P. Farail, R. Vingerhoes, A. Rossignol, J.-P. Talpin, D. Chemouil.
The Topcased project - a toolkit in open-source for critical application and system development, in: International Space System Engineering Conference, Eurospace, May 2006.

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