Team DaRT

Overall Objectives
Scientific Foundations
Application Domains
New Results
Contracts and Grants with Industry
Other Grants and Activities

Section: New Results

Co-modeling for HP-SoC design

Participants : Adolf Abdallah, Pierre Boulet, Jean-Luc Dekeyser, Abdoulaye Gamatié, Souha Kamoun, Vlad Rusu, Nicolas Wojcik.

An operational semantics for RSM

The Repetitive Structure Modeling (RSM) package of the UML MARTE profile is used to describe repetitive computations and topologies (e.g., data-parallel algorithms, grid of processing units) in an embedded system. In Gaspard2, the concepts provided by this package are of prime importance for the specification of data-intensive applications. A formal semantics [53] has been previously defined for the Array-OL language, which is the basis for the definition of RSM. Now, we propose an new formal semantics for RSM, which is operational unlike [53] . Execution semantic descriptions are rarely taken into account in the definition of UML profiles. This raises several serious correctness issues about the manipulation of models defined with these profiles. The aim of our new semantics is to answer this demand by proposing a help for understanding the behavior and execution of models specified with RSM concepts in UML MARTE.

Clock-based modeling of embedded system behavior

This research mainly focuses on the modeling of data-intensive embedded system behaviors within the Gaspard2 framework [22] [39] . Algorithms describing data intensive computations are described in the application specification. In particular, the concepts defined in the RSM package of MARTE allow one to suitably describe the application. In order to add more details about the system functional behavior, logical clocks are associated with components to describe the expected rates at which data should be processed. The Time sub-profile of MARTE is used to model this rate information. It offers a rich expressivity for describing both logical and physical time aspects [47] . The rate constraints are expressed using the CCSL package of MARTE in the form of clock constraints. We refer to this clock constraints as functional clock properties.

In order to implement the functionality of the system, the physical resources that implement the associated algorithms are also specified in an architecture specification phase. In Gaspard2, only the HWLogical sub-package of MARTE is used. For each physical resource, hardware IPs are deployed in order to refine the models towards a specific technology. At this level, we extract information concerning the processors speed represented by its frequency. We synthesize new clocks that represent the periods of the clock cycles for each processor involved in the execution. All clocks are related to an ideal clock. The occurrence of the instants of the ideal clock are fast enough to capture any instant of the processors clocks. We refer to these clock specifications as physical clock properties.

Since application functionality and hardware architecture are modeled independently in Gaspard2, the allocation phase bridges these two different views in order to map functionality on their associated physical resources. In terms of clocks, this allocation is expressed as the mapping of functional clock properties onto physical clock properties, according to a particular mapping algorithm. The result of such allocation is a new set of clocks reflecting the simulation of the temporal behavior of the system during execution. We refer to these clock description as simulation clock properties. They are usable for a very relevant system analysis.

High-level modeling and exploration of non functional properties

During the last year, we have proposed an approach for high-level modeling and exploration of non functional properties. Our work proposes a Model Driven Engineering (MDE)-based approach to integrate non functional requirements for systems on chip and defines metamodels that allow the integration of external optimization tools in the Gaspard2 environment. The designer creates the application and architecture models at a high level. The designer should then take the decision to allocate application functions on hardware components. This decision depends essentially on the non functional properties of both of the software and hardware components. For this reason, it is necessary to express these requirements. The proposed methodology uses models enriched with non-functional properties to drive the optimization of resource allocation. It aims at the integration of two optimization tools: SynDEx and an internal tool developed within the team.

The designer starts creating applications in Gaspard2 by defining application and architecture models using the UML component diagram. Components are stereotyped with MARTE concepts. The next step consists in transforming the obtained models according to the choice of the optimization tool to use. For the SynDEx transformation only the application and architecture model are considered. However, for the Benyamina tool a mapping graph of tasks into hardware components is needed. We have defined a graph metamodel that allows generating graph models that serve as support for optimization heuristics defined in the Benyamina tool.

HPF towards Marte

Concerning the power of expression of the MARTE RSM subprofile that we have defined, we have studied the data and computation distribution capabilities. We have proved that the MARTE «distribute» stereotype is at least as expressive as the well known High Performance Fortran data distribution. The proof is constructive: starting from an ALIGN and a DISTRIBUTE HFP directive, we build a MARTE «distribute».


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