Team Compsys
Members
Overall Objectives
Introduction
General presentation
Highlights of the first 4-years period
Highlights of 2009
Scientific Foundations
Introduction
Back-end code optimizations for embedded processors
Program analysis and transformations for high-level synthesis
Application Domains
Application Domains
Software
Introduction
Pip
Syntol
Cl@k
Bee
RanK
c2fsm
LAO developments in aggressive compilation
LAO developments in JIT compilation
New Results
Introduction
Revisiting out-of-SSA translation for correctness, efficiency, and speed
Split register allocation: linear complexity without performance penalty
Register-allocated SSA destruction: handling of critical edges
“Optimal” formulation of register spilling
Fast computation of liveness sets
Static single information form: debunking
Loop transformations for high-level synthesis and communication optimizations
Program termination and worst-case computational complexity
Contracts and Grants with Industry
Minalogic SCEPTRE project with STMicroelectronics on SSA, register allocation, and aggressive compilation
Nano2012 MEDIACOM project with STMicroelectronics on SSA, register allocation, and JIT compilation
Nano2012 S2S4HLS project with STMicroelectronics on source-to-source transformations for high-level synthesis
Other Grants and Activities
Informal cooperations
Dissemination
Introduction
Conferences and journals
Teaching and thesis advising
Teaching responsibilities
Animation
Defense committees
Workshops, seminars, and invited talks
Bibliography
Publications of the year
References in notes
Inria
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Raweb 2009
Presentation of the Project Compsys
Section: Dissemination
Introduction
This section lists the various scientific and teaching activities of the team in 2009.
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