Project-Cairn:LDPC-Dec-DVBS2: Low Density Parity Code (LDPC) Decoder Architecture

Team Cairn

Members

Overall Objectives

Overall Objectives
Highlights

Scientific Foundations

Panorama
Dynamically and Heterogeneous Reconfigurable Platforms
Compilation and Synthesis for Reconfigurable Platform
Algorithm Architecture Interaction

Application Domains

Panorama
4G Wireless Communication Systems
Wireless Sensor Networks
Automotive Systems
Multimedia processing

Software

Panorama
Gecos
ID.Fix: Infrastructure for the Design of Fixed-point Systems
UPaK: Abstract Unified Pattern-Based Synthesis Kernel for Hardware and Software Systems
DURASE: Automatic Synthesis of Application-Specific Processor Extensions
PowWow: Power Optimized Hardware and Software FrameWork for Wireless Motes
Interconnect Explorer: a High-Level Power and Delay Estimation Tool for On-Chip Interconnects
SoCLib: Open Platform for Virtual Prototyping of Multi-Processors System on Chip
LDPC-Dec-DVBS2: Low Density Parity Code (LDPC) Decoder Architecture
OCHRE: On-Chip Randomness Extraction

New Results

Dynamically and Heterogeneous Reconfigurable Platforms
Compilation and Synthesis for Reconfigurable Platform
Algorithm Architecture Interaction

Contracts and Grants with Industry

ITEA2 - GEODES (2008-2011)
NANO2012 Program - S2S4HLS (2008-2012)
NANO2012 Program - RecMotifs (2008-2012)
ANR Architectures du Futur Open-People (2009-2011)
ANR BioWiiC (2009-2011)
ANR Architectures du Futur - CIFAER (2008-2011)
ANR Architectures du Futur - FOSFOR (2008-2011)
ANR Technologies Logicielles - SoCLib (2007-2010)
Pôle Images et Réseaux - SPRING (2008-2009)
Pôle Images et Réseaux - Transmedi@ (2008-2009)
Pôle Images et Réseaux - RPS2 (2008-2010)
ANR Architectures du Futur - ROMA: Reconfigurable Operators for Multimedia Applications (2007-2010)
OverSoc (2005-2009)
Captiv (2006-2009)

Other Grants and Activities

National Initiatives
European Initiatives
International Initiatives
Exterior research visitors

Dissemination

Scientific Community Animation
Current Ph.D. Subjects
Seminars and Invitations
Teaching and Responsabilities

Bibliography

Major publications
Publications of the year
References in notes

Inria / Raweb 2009
Presentation of the Project Cairn

Section: Software

LDPC-Dec-DVBS2: Low Density Parity Code (LDPC) Decoder Architecture

Participants : François Charot [ correspondant ] , Florent Berthelot.

LDPC-Dec-DVBS2 is an RTL model in the VHDL hardware description language of a LDPC decoder for the digital video broadcast DVB-S2 standard. LDPC-Dec-DVBS2 is implemented as a synthesizable VHDL model. It is capable of processing all specified code rates of the DVB standard. This model is developed in the framework of the RPS2 project.

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