Section: Contracts and Grants with Industry
Pôle Images et Réseaux - RPS2 (2008-2010)
Participants : Florent Berthelot, François Charot, Charles Wagner, Christophe Wolinski.
The RPS2 project started in November 2008. It aims at developing a FPGA-based demonstrator of a DVB-S2 receiver targeting professional applications. RPS2 involves three partners: Inria Rennes, Ditocom and Supelec Rennes. The contribution of Cairn concerns the design of the hardware architecture of the FEC (Forward Error Correction) process of the DVB-S2 decoding system. This hardware architecture implements low-density parity-check (LDPC) code decoding.