Inria / Raweb 2009
Presentation of the Project Alchemy

Bibliography

Major publications by the team in recent years

[1]: F. Agakov, E. Bonilla, J. Cavazos, B. Franke, G. Fursin, M. O'Boyle, J. Thomson, M. Toussaint, C. Williams.
Using Machine Learning to Focus Iterative Optimization, in: Proceedings of the 4th Annual International Symposium on Code Generation and Optimization (CGO), 2006.
[2]: H. Berry, D. Gracia Pérez, O. Temam.
Chaos in computer performance, in: Chaos, 2006, vol. 16, 013110 p
http://hal.inria.fr/inria-00000109/en/.
[3]: A. Cohen, M. Duranton, C. Eisenbeis, C. Pagetti, F. Plateau, M. Pouzet.
N-Sychronous Kahn Networks, in: 33th ACM Symp. on Principles of Programming Languages (PoPL'06), Charleston, South Carolina, January 2006, p. 180–193
http://www-rocq.inria.fr/~acohen/publications/CDEPPP06.ps.gz.
[4]: A. Cohen, S. Girbal, O. Temam.
A Polyhedral Approach to Ease the Composition of Program Transformations, in: Euro-Par'04, Pisa, Italy, LNCS, Springer-Verlag, August 2004, n^o 3149, p. 292–303
http://www-rocq.inria.fr/~acohen/publications/CGT04.ps.gz.
[5]: D. Gracia Pérez, G. Mouchard, O. Temam.
MicroLib: A Case for the Quantitative Comparison of Micro-Architecture Mechanisms, in: MICRO-37: Proceedings of the 37th International Symposium on Microarchitecture, IEEE Computer Society, Dec 2004, p. 43–54.
[6]: F. Gruau, Y. Lhuillier, P. Reitz, O. Temam.
Blob Computing, in: Computing Frontiers 2004 ACM SIGMicro., 2004
http://blob.lri.fr/publication/2004-model-blob-machine.pdf.
[7]: P. Palatin, Y. Lhuillier, O. Temam.
Capsule : Hardware-Assisted Parallel Execution of Component-Based Programs, in: The 39th Annual IEEE/ACM International Symposium on Microarchitecture, 2006, Orlando, Florida, december 2006.
[8]: D. Parello, O. Temam, J.-M. Verdun.
On increasing architecture awareness in program optimizations to bridge the gap between peak and sustained processor performance : Matrix-Multiply revisited, in: Supercomputing, IEEE, Nov 2002.
[9]: S. Pop, A. Cohen, G.-A. Silber.
Induction Variable Analysis with Delayed Abstractions, in: Intl. Conf. on High Performance Embedded Architectures and Compilers (HiPEAC'05), Barcelona, Spain, LNCS, Springer-Verlag, November 2005, n^o 3793, p. 218–232
http://www-rocq.inria.fr/~acohen/publications/PCS05.ps.gz.
[10]: N. Vasilache, C. Bastoul, S. Girbal, A. Cohen.
Violated dependence analysis, in: Proceedings of the ACM International Conference on Supercomputing (ICS'06), Cairns, Australia, ACM, June 2006.

Publications of the year

Articles in International Peer-Reviewed Journal

[11]: W. Bielecki, M. Palkowski, A. Beletska.
Extracting representative loop statement instances of synchronization-free slices, in: Measurement Automation and Monitoring, 2009, vol. 10, p. 807–811.
[12]: M. De Pittà, M. Goldberg, V. Volman, H. Berry, E. Ben-Jacob.
Glutamate regulation of calcium and IP3 oscillating and pulsating dynamics in astrocytes, in: Journal of Biological Physics, 2009, vol. 35, n^o 4, p. 383–411.
[13]: M. De Pittà, M. Goldberg, V. Volman, H. Berry, E. Ben-Jacob.
Glutamate regulation of calcium and IP3 oscillating and pulsating dynamics in astrocytes, in: Journal of Biological Physics, 2009, vol. 35, p. 383-411.
[14]: G. Fursin, O. Temam.
Collective Optimization, in: ACM, Transactions on Architecture and Code Optimization (TACO), 2010.
[15]: C. Glitia, P. Dumont, P. Boulet.
Array-OL with delays, a domain specific specification language for multidimensional intensive signal processing., in: Multidimensional Systems and Signal Processing, 2009
http://springerlink.com/content/w3821760381l4432/?p=fc0a4428f2f4468a9d630d2a434a6f69&pi=0.
[16]: S. Long, G. Fursin.
Systematic search within an optimisation space based on Unified Transformation Framework, in: International Journal of Computational Science and Engineering (IJCSE), 2009, vol. 4, n^o 2, p. 102-111.

Articles in National Peer-Reviewed Journal

[17]: H. Berry, B. Cessac.
Du chaos dans les neurones, in: Pour La Science, November 2009, vol. 385, p. 108-115.

International Peer-Reviewed Conference/Proceedings

[18]: M. BACHIR, D. Gregg, S.-A.-A. Touati.
Using The Meeting Graph Framework to Minimise Kernel Loop Unrolling for Scheduled Loops, in: The 22nd International Workshop on Languages and Compilers for Parallel Computing (LCPC09), Delaware, USA, October 8-10, 2009, 2009.
[19]: M. Bahi, C. Eisenbeis.
Spatial complexity of reversibly computable DAG, in: CASES, International Conference on Compilers, Architecture, and Synthesis for embedded systems, 2009, p. 47-56.
[20]: C. Bastoul, N. Vasilache, A. Leung, B. Meister, D. Wohlford, R. Lethin.
Extended Static Control Programs as a Programming Model for Accelerators, A Case Study: Targetting ClearSpeed CSX700 With the R-Stream Compiler, in: PMEA'09 Workshop on Programming Models for Emerging Architectures, Raleigh, North Carolina, September 2009, p. 45-52.
[21]: A. Beletska, D. Barthou, W. Bielecki, A. Cohen.
Computing the Transitive Closure of a Union of Affine Integer Tuple Relations, in: International Conference on Combinatorial Optimization and Applications COCOA'09, June 2009, p. 98-109.
[22]: A. Beletska, W. Bielecki, A. Cohen, M. Palkowski.
Synchronization-free automatic parallelization: Beyond affine iteration-space slicing, in: 22nd International Workshop on Languages and Compilers for Parallel Computing (LCPC'09), October 2009.
[23]: A. Beletska, W. Bielecki, A. Cohen, M. Palkowski, K. Siedlecki.
Coarse-grained loop parallelization: Iteration space slicing vs affine transformations, in: IEEE International Symposium on Parallel and Distributed Computing (ISPDC'09), July 2009.
[24]: A. Cohen, L. Mandel, F. Plateau, M. Pouzet.
Relaxing synchronous composition with clock abstraction, in: Hardware Design and Functional Languages Workshop (HFL'09), March 2009.
[25]: V. Desmet, S. Girbal, O. Temam.
ArchExplorer.org: Joint Compiler/Hardware Exploration for Fair Comparison of Architectures, in: International Workshop on Interaction between Compilers and Computer Architecture (INTERACT), February 2009.
[26]: V. Desmet, S. Girbal, O. Temam.
A Methodology for Facilitating a Fair Comparison of Research Ideas, in: IEEE, International Symposium on Performance Analysis of Systems and Software (ISPASS), White Plains, NY, IEEE Computer Society Press, March 2010.
[27]: B. Diouf, Ö. Öztürk, A. Cohen.
Optimizing local memory allocation and assignment through a decoupled approach, in: 22nd International Workshop on Languages and Compilers for Parallel Computing (LCPC'09), October 2009.
[28]: C. Dubach, T. Jones, E. Bonilla, G. Fursin, M. O'Boyle.
Portable Compiler Optimization Across Embedded Programs and Microarchitectures using Machine Learning, in: 42nd IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2009.
[29]: N. Fates, H. Berry.
Critical phenomena in a discrete stochastic reaction-diffusion medium, in: Fourth International Workshop on Natural Computing, IWNC 2009, September 2009.
[30]: M. Fellahi, A. Cohen.
Software Pipelining in Nested Loops with Prolog-Epilog Merging, in: Proceedings of the International Conference on High Performance Embedded Architectures & Compilers (HiPEAC 2009), January 2009, p. 80-94.
[31]: G. Fursin.
Collective Tuning Initiative: automating and accelerating development and optimization of computing systems, in: Proceedings of the GCC Developers' Summit, June 2009.
[32]: G. Fursin, O. Temam.
Collective Optimization, in: Proceedings of the International Conference on High Performance Embedded Architectures & Compilers (HiPEAC 2009), January 2009.
[33]: G. Grosdidier, C. Eisenbeis, F. Bodin, A. Seznec, R. Bilhaut, G. Le Meur, P. Roudeau, F. Touze, J.-C. Angles D'Auriac, J. Carbonell, D. Becirevic, P. Boucaud, O. Brand-Foissac, O. Pene, D. Barthou, P. Guichon, P. Honore, P. Gallard, L. Rilling.
The PetaQCD project, in: 17th International Conference on Computing in High Energy and Nuclear Physics (CHEP09), Prague Tchèque, République, 03 2009
http://hal.in2p3.fr/in2p3-00380246/en/, The proceedings of the International Conference on Computing in High Energy and Nuclear Physics (CHEP 2009) will be published in the open access Journal of Physics: Conference Series (JPCS), published by IOP Publishing. All papers will be free to read and download immediately upon publication. LAL 09-58.
[34]: A. Hartono, M. Baskaran, C. Bastoul, A. Cohen, S. Krishnamoorthy, B. Norris, J. Ramanujam, P. Sadayappan.
Parametric Multi-Level Tiling of Imperfectly Nested Loops, in: Proceedings of the ACM International Conference on Supercomputing (ICS'09), Yorktown Heights, New York, June 2009, p. 147-157.
[35]: A. Hashmi, H. Berry, M. Lipasti, O. Temam.
Leveraging Progress in Neurobiology for Computing Systems, in: New Directions in Computer Architecture (NDCA), in conjunction with MICRO, New York, December 2009.
[36]: A. Hashmi, H. Berry, O. Temam, M. Lipasti.
Leveraging progress in neurobiology for computing systems, in: 1st Workshop on New Directions in Computer Architecture (NDCA-1), December 2009.
[37]: K. Ibrahim, J. Jaeger, Z. Liu, L.-N. Pouchet, P. Lesnicki, L. Djoudi, D. Barthou, F. Bodin, C. Eisenbeis, G. Grosdidier, O. Pene, P. Roudeau.
Simulation of the Lattice QCD and Technological Trends in Computation, in: Workshop on Compilers for Parallel Computing, Zurich, Switzerland, January 2009, arXiv:0808.0391v3.
[38]: F. Jiang, H. Berry, M. Schoenauer.
The Impact of Network Topology on Self-Organizing Maps, in: World Summit on Genetic and Evolutionary Computation, GECS-2009, June 2009.
[39]: F. Jiang, H. Berry, M. Schoenauer.
The Impact of Network Topology on Self-Organizing Maps, in: World Summit on Genetic and Evolutionary Computation, GECS-2009, Shangai, China, June 2009.
[40]: V. Jimenez, I. Gelado, L. Vilanova, M. Gil, G. Fursin, N. Navarro.
Predictive runtime code scheduling for heterogeneous architectures, in: Proceedings of the International Conference on High Performance Embedded Architectures & Compilers (HiPEAC 2009), January 2009.
[41]: L. Luo, Y. Chen, C. Wu, S. Long, G. Fursin.
Finding representative sets of optimizations for adaptive multiversioning applications, in: 3rd Workshop on Statistical and Machine Learning Approaches Applied to Architectures and Compilation (SMART'09), colocated with HiPEAC'09 conference, January 2009.
[42]: B. Meister, A. Leung, N. Vasilache, D. Wohlford, C. Bastoul, R. Lethin.
Productivity via Automatic Code Generation for PGAS Platforms with the R-Stream Compiler, in: APGAS'09 Workshop on Asynchrony in the PGAS Programming Model, Yorktown Heights, New York, June 2009.
[43]: M. Schindewolf, A. Cohen, W. Karl, A. Marongiu, L. Benini.
Towards transactional memory support for GCC, in: GCC Research Opportunities Workshop (GROW'09, associated with HiPEAC), January 2009.
[44]: O. Temam.
ANNs as Efficient and Robust Accelerators for Emerging Applications, in: New Directions in Computer Architecture (NDCA), in conjunction with MICRO, New York, December 2009.
[45]: J. Thomson, M. O'Boyle, G. Fursin, B. Franke.
Reducing Training Time and Calculating Confidence in a Machine Learning-based Compiler, in: 22nd International Workshop on Languages and Compilers for Parallel Computing (LCPC'09), October 2009.
[46]: K. Trifunovic, D. Nuzman, A. Cohen, A. Zaks, I. Rosen.
Polyhedral-model guided loop-nest auto-vectorization, in: In Parallel Architectures and Compilation Techniques (PACT'09), September 2009.
[47]: S. Yehia, S. Girbal, H. Berry, O. Temam.
Reconciling Specialization and Flexibility Through Compound Circuits, in: 15th International Symposium on High-Performance Computer Architecture, HPCA, Raleigh, North Carolina, February 2009.

Workshops without Proceedings

[48]: V. Desmet, S. Girbal, O. Temam.
Opening Up Automatic Structural Design-Space Exploration by Fixing Modular Simulation, in: HiPEAC Industrial Workshop, November 2009.

Internal Reports

[49]: M.-W. Benabderrahmane, C. Bastoul, L.-N. Pouchet, A. Cohen.
A Conservative Approach to Handle Full Functions in the Polyhedral Model, INRIA Research Report, January 2009, n^o 6814, Technical report.
[50]: S. Briais, S. Touati.
Schedule-Sensitive Register Pressure Reduction in Innermost Loops, Basic Blocks and Super-Blocks, Inria, 2009
http://hal.archives-ouvertes.fr/inria-00436348/PDF/main_siralina_report.pdf, Technical report.
[51]: S. Briais, S.-A.-A. Touati.
Experimental Study of Register Saturation in Basic Blocks and Super-Blocks: Optimality and heuristics, Inria, 2009
http://hal.archives-ouvertes.fr/inria-00431103/PDF/main_RS_report.pdf, experimental data and free software are included (made public).
[52]: S.-A.-A. TOUATI.
Cyclic Task Scheduling with Storage Requirement Minimization under Specific Architectural Constraints: Case of Buffers and Rotating Storage Facilities, Inria, 2009
http://hal.archives-ouvertes.fr/inria-00440446/PDF/PSSR.pdf, This is a continuation work to SIRA (Sid-Ahmed-Ali Touati and Christine Eisenbeis. Early Periodic Register Allocation on ILP Processors. Parallel Processing Letters, Vol. 14, No. 2, June 2004. World Scientific.). We exetend that work with new heuristics and experimental results..

References in notes

[53]: FLEXUS
http://www.ece.cmu.edu/~simflex/flexus.html.
[54]: GCC ICI: Interactive Compilation Interface
http://gcc-ici.sourceforge.net.
[55]: European Network of Excellence on High-Performance Embedded Architecture and Compilation (HiPEAC)
http://www.hipeac.net.
[56]: MILEPOST project media coverage
http://www.milepost.eu/media.html.
[57]: EU Milepost project (MachIne Learning for Embedded PrOgramS opTimization).
[58]: SystemC v2.0.1 Language Reference Manual, 2003
http://www.systemc.org/.
[59]: UNISIM: UNIted SIMulation environment
http://unisim.org.
[60]: F. Agakov, E. Bonilla, J. Cavazos, B. Franke, G. Fursin, M. F. P. O'Boyle, J. Thomson, M. Toussaint, C. Williams.
Using Machine Learning to Focus Iterative Optimization, in: Proceedings of the 4th Annual International Symposium on Code Generation and Optimization (CGO), 2006.
[61]: F. Agakov, E. Bonilla, J. Cavazos, B. Franke, G. Fursin, M. F. P. O'Boyle, J. Thomson, M. Toussaint, C. Williams.
Using Machine Learning to Focus Iterative Optimization, in: CGO-4: The Fourth Annual International Symposium on Code Generation and Optimization, 2006.
[62]: R. Allen, D. Callahan, K. Kennedy.
Automatic decomposition of scientific programs for parallel execution, in: Proceedings of the 14th ACM SIGACT-SIGPLAN symposium on Principles of programming languages, ACM Press, 1987, p. 63–76
http://doi.acm.org/10.1145/41625.41631.
[63]: M. Bahi, C. Eisenbeis, B. Dauvergne, A. Cohen.
Spatial complexity of reversible computing, in: Third International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (ACACES'08), L'Aquila, Italy, July 2008.
[64]: J.-P. Banâtre, D. L. Métayer.
Gamma and the Chemical Reaction Model : Ten Years After, in: Coordination Programming: Mechanisms, Models and Semantics, J.-M. Andreoli, H. Gallaire, D. L. Métayer (editors), 1996, p. 1–39.
[65]: C. Bastoul.
Code Generation in the Polyhedral Model Is Easier Than You Think, in: PACT'13 IEEE International Conference on Parallel Architecture and Compilation Techniques, Juan-les-Pins, september 2004, p. 7–16
http://hal.ccsd.cnrs.fr/ccsd-00017260.
[66]: C. Bastoul, A. Cohen, S. Girbal, S. Sharma, O. Temam.
Putting Polyhedral Loop Transformations to Work, in: Workshop on Languages and Compilers for Parallel Computing (LCPC'03), College Station, Texas, LNCS, Springer-Verlag, October 2003, p. 23–30.
[67]: H. Berry, D. Gracia Pérez, O. Temam.
Chaos in computer performance, in: Chaos, 2006, vol. 16, 013110 p
http://hal.inria.fr/inria-00000109/en/.
[68]: H. Berry, D. Gracia Pérez, O. Temam.
Complex dynamics of microprocessor performances during program execution: Regularity, chaos, and others, in: NKS2006 Wolfram Science Conference, Washington D.C., USA, June 2006.
[69]: H. Berry, M. Quoy.
Structure and dynamics of random recurrent neural networks, in: Adaptive Behavior, 2006, vol. 14, p. 129-137.
[70]: H. Berry, O. Temam.
Modeling Self-Developping Biological Neural Network, in: Neurocomputing, 2007, vol. 70, n^o 16-18, p. 2723–2734.
[71]: P. Berube, J. Amaral.
Aestimo: a feedback-directed optimization evaluation tool, in: Proceedings of the International Symposium on Performance Analysis of Systems and Software (ISPASS), 2006.
[72]: N. L. Binkert, R. G. Dreslinski, L. R. Hsu, K. T. Lim, A. G. Saidi, S. K. Reinhardt.
The M5 Simulator: Modeling Networked Systems, in: IEEE Micro, 2006, vol. 26, n^o 4, p. 52–60
http://dx.doi.org/10.1109/MM.2006.82.
[73]: R. Blumofe, C. Joerg, B. Kuszmaul, C. Leiserson, K. Randall, Y. Zhou.
Cilk: An Efficient Multithreaded Runtime System, in: Proceedings of the 5th Symposium on Principles and Practice of Parallel Programming, 1995
http://citeseer.ist.psu.edu/blumofe95cilk.html.
[74]: D. Burger, T. M. Austin.
The SimpleScalar tool set, version 2.0, in: SIGARCH Comput. Archit. News, 1997, vol. 25, n^o 3, p. 13–25
http://doi.acm.org/10.1145/268806.268810.
[75]: J. Cavazos, C. Dubach, F. Agakov, E. Bonilla, M. F. P. O'Boyle, G. Fursin, O. Temam.
Automatic Performance Model Construction for the Fast Software Exploration of New Hardware Designs, in: International Conference on Compilers, Architecture, And Synthesis For Embedded Systems (CASES 2006), October 2006, To appear.
[76]: O. Certner, Z. Li, P. Palatin, O. Temam, F. Arzel, N. Drach.
A Practical Approach for Reconciling High and Predictable Performance in Non-Regular Parallel Programs, in: DATE 2008, Munich, Germany, march 2008, p. 740–745.
[77]: Z. Chamski, M. Duranton, A. Cohen, C. Eisenbeis, P. Feautrier, D. Genius.
Application Domain-Driven System Design for Pervasive Video Processing, in: Ambient Intelligence: Impact on Embedded-System Design, Kluwer Academic Press, 2003.
[78]: J. Chen, P. Juang, K. Ko, G. Contreras, D. Penry, R. Rangan, A. Stoler, L.-S. Peh, M. Martonosi.
Hardware-modulated parallelism in chip multiprocessors, in: SIGARCH Comput. Archit. News, Special Issue: Proc. of the dasCMP'05 Workshop, 2005, vol. 33, n^o 4, p. 54–63
http://doi.acm.org/10.1145/1105734.1105742.
[79]: A. Cohen, M. Duranton, C. Eisenbeis, C. Pagetti, F. Plateau, M. Pouzet.
Synchronization of Periodic Clocks, in: ACM Conf. on Embedded Software (EMSOFT'05), Jersey City, New York, September 2005
http://www-rocq.inria.fr/~acohen/publications/CDEPPP05.ps.gz.
[80]: A. Cohen, M. Duranton, C. Eisenbeis, C. Pagetti, F. Plateau, M. Pouzet.
N-Sychronous Kahn Networks, in: 33th ACM Symp. on Principles of Programming Languages (PoPL'06), Charleston, South Carolina, January 2006, p. 180–193
http://www-rocq.inria.fr/~acohen/publications/CDEPPP06.ps.gz.
[81]: A. Cohen, D. Genius, A. Kortebi, Z. Chamski, M. Duranton, P. Feautrier.
Multi-Periodic Process Networks: Prototyping and Verifying Stream-Processing Systems, in: Euro-Par'02, Paderborn, Germany, LNCS, Springer-Verlag, August 2002, vol. 2400
http://www-rocq.inria.fr/~acohen/publications/CGKCDF02.ps.gz.
[82]: A. Cohen, S. Girbal, D. Parello, M. Sigler, O. Temam, N. Vasilache.
Facilitating the Search for Compositions of Program Transformations, in: ACM Intl. Conf. on Supercomputing (ICS'05), Boston, Massachusetts, June 2005, p. 151–160
http://www-rocq.inria.fr/~acohen/publications/CGPSTV05.ps.gz.
[83]: A. Cohen, S. Girbal, O. Temam.
A Polyhedral Approach to Ease the Composition of Program Transformations, in: Euro-Par'04, Pisa, Italy, LNCS, Springer-Verlag, August 2004, n^o 3149, p. 292–303
http://www-rocq.inria.fr/~acohen/publications/CGT04.ps.gz.
[84]: K. D. Cooper, A. Grosul, T. J. Harvey, S. Reeves, D. Subramanian, L. Torczon, T. Waterman.
ACME: adaptive compilation made efficient, in: Proceedings of the Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2005, p. 69–77.
[85]: K. D. Cooper, D. Subramanian, L. Torczon.
Adaptive Optimizing Compilers for the 21st Century, in: J. Supercomput., 2002, vol. 23, n^o 1, p. 7–22
http://dx.doi.org/10.1023/A:1015729001611.
[86]: L. Dagum, R. Menon.
OpenMP: An Industry- Standard API for Shared- Memory Programming, in: IEEE COMPUTATIONAL SCIENCE & ENGINEERING, 1998, p. 46-55.
[87]: M. Dupré, N. Drach, O. Temam.
Quickly building an optimizer for complex embedded architectures, in: International Symposium on Code Generation and Optimization, ACM/IEEE, Mar 2004.
[88]: J. S. Emer, P. Ahuja, E. Borch, A. Klauser, C.-K. Luk, S. Manne, S. S. Mukherjee, H. Patil, S. Wallace, N. L. Binkert, R. Espasa, T. Juan.
Asim: A Performance Model Framework., in: IEEE Computer, 2002, vol. 35, n^o 2, p. 68-76.
[89]: K. Fatahlian, T. J. Knight, M. Houston, M. Erez, D. R. Horn, L. Leem, J. Y. Park, M. Ren, A. Aiken, W. J. Dally, P. Hanrahan.
Sequoia: Programming the Memory Hierarchy, in: Supercomputing 2006, Tampa, Florida, November 2006.
[90]: P. Feautrier.
Dataflow Analysis of Array and scalar references, in: Int. J. of Parallel Programming, 1991, vol. 20, n^o 1, p. 23-53.
[91]: P. Feautrier.
Some efficient solutions to the affine scheduling problem I. One-dimensional time, in: Int. J. of Parallel Programming, 1992, vol. 21, n^o 5, p. 313-347.
[92]: P. Feautrier.
Some efficient solutions to the affine scheduling problem II. Multi-dimensional time, in: Int. J. of Parallel Programming, 1992, vol. 21, n^o 6, p. 389-420.
[93]: B. Franke, M. F. P. O'Boyle, J. Thomson, G. Fursin.
Probabilistic Source-Level Optimisation of Embedded Programs, in: Proceedings of the Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2005.
[94]: G. Fursin, A. Cohen.
Building a Practical Iterative Interactive Compiler, in: 1st Workshop on Statistical and Machine Learning Approaches Applied to Architectures and Compilation (SMART'07), colocated with HiPEAC 2007 conference, Ghent, Belgium, January 2007.
[95]: G. Fursin, A. Cohen, M. O'Boyle, O. Temam.
A Practical Method For Quickly Evaluating Program Optimizations, in: Intl. Conf. on High Performance Embedded Architectures and Compilers (HiPEAC'05), Barcelona, Spain, LNCS, Springer-Verlag, November 2005, n^o 3793, p. 29–46
http://hal.inria.fr/inria-00001054/en/.
[96]: G. Fursin, A. Cohen, M. O'Boyle, O. Temam.
Quick and practical run-time evaluation of multiple program optimizations, in: Trans. on High Performance Embedded Architectures and Compilers, 2006, vol. 1, n^o 1, p. 13-31.
[97]: G. Fursin, A. Cohen, M. F. P. O'Boyle, O. Temam.
Quick and practical run-time evaluation of multiple program optimizations, in: Trans. on High Performance Embedded Architectures and Compilers, January 2007, vol. 1, n^o 1, p. 13-31.
[98]: G. Fursin, C. Miranda, O. Temam, M. Namolaru, E. Yom-Tov, A. Zaks, B. Mendelson, P. Barnard, E. Ashton, E. Courtois, F. Bodin, E. Bonilla, J. Thomson, H. Leather, C. Williams, M. O'Boyle.
MILEPOST GCC: machine learning based research compiler, in: Proceedings of the GCC Developers' Summit, June 2008.
[99]: G. Fursin, M. F. P. O'Boyle, P. Knijnenburg.
Evaluating Iterative Compilation, in: Proc. Languages and Compilers for Parallel Computers (LCPC), 2002, p. 305-315.
[100]: S. Genet, B. Delord, L. Sabarly, E. Guigon, H. Berry.
On the propagation of Ca-dependent plateau and valley potentials in cerebellar Purkinje cells and how they drive the cell output, in: Proceedings of NeuroComp'06, Pont-à-Mousson, France, 23-24 October 2006, p. 167–170.
[101]: J.-L. Giavitto, O. Michel.
MGS: a Rule-Based Programming Language for Complex Objects and Collections, in: Electronic Notes in Theoretical Computer Science, 2001, vol. 59, n^o 4.
[102]: S. Girbal, N. Vasilache, C. Bastoul, A. Cohen, D. Parello, M. Sigler, O. Temam.
Semi-Automatic Composition of Loop Transformations for Deep Parallelism and Memory Hierarchies, in: Intl. J. of Parallel Programming, 2006, Accepted with minor revisions.
[103]: S. C. Goldstein, M. Budiu.
NanoFabrics: spatial computing using molecular electronics, in: Proceedings of the 28th annual international symposium on Computer architecture, Göteborg, Sweden, ACM Press, 2001, p. 178–191.
[104]: D. Gracia Pérez, H. Berry, O. Temam.
IDDCA: A New Clustering Approach For Sampling, in: MoBS: Workshop on Modeling, Benchmarking, and Simulation MoBS: Workshop on Modeling, Benchmarking, and Simulation, Madison, Wisconsin, 2005
http://hal.inria.fr/inria-00001062/en/.
[105]: D. Gracia Pérez, H. Berry, O. Temam.
Budgeted Region Sampling (BeeRS): Do Not Separate Sampling From Warm-Up, And Then Spend Wisely Your Simulation Budget, in: 5th IEEE International Symposium on Signal Processing and Information Technology 5th IEEE International Symposium on Signal Processing and Information Technology, Athens, Greece, 2006
http://hal.inria.fr/inria-00001061/en/.
[106]: D. Gracia Pérez, G. Mouchard, O. Temam.
MicroLib: A Case for the Quantitative Comparison of Micro-Architecture Mechanisms, in: MICRO-37: Proceedings of the 37th International Symposium on Microarchitecture, IEEE Computer Society, Dec 2004, p. 43–54
http://dx.doi.org/10.1109/MICRO.2004.25.
[107]: F. Gruau, Y. Lhuillier, P. Reitz, O. Temam.
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