Section: Application Domains
System on chip
Achieving a good compromise between computing power and energy consumption is one of the challenge in embedded architecture of the future. This management is especially difficult for 45nm or 32nm known to be at the limit of the scalability. Automatic control loops have therefore to be designed in order to make the performance fit the requirement in order to minimize the energy loss in a context of highly unknown performance of the chip. The main objective is to control the computing power and the consumption using the voltage and frequency automatically according to the requirements of the OS. For this, appropriate sensors must be implemented on the chip and a high-performance repartition between hardware and software implementation must be made.
Server systems (Internet, database, news, etc.) is a very active industry in the communication area. Tuning servers is currently done with the experience and the feeling of human operators with potential problems like under-optimality or even trashing phenomena in case of bad tuning. The NeCS team has started research on that subject in collaboration with the INRIA-Sardes team to use control theory tools to control in closed-loop server systems and especially their admission. This goes in the direction to fully autonomous servers in completely heterogeneous aggregation of servers.