Section: Scientific Foundations
Model-based optimization and compilation techniques
Optimization for parallelism
We study optimization techniques to produce “good” schedules and mappings of a given application onto a hardware SoC architecture. These heuristic techniques aim at fulfilling the requirements of the application, whether they be real time, memory usage or power consumption constraints. These techniques are thus multi-objective and target heterogeneous architectures.
We aim at taking advantage of the parallelism (both data-parallelism and task parallelism) expressed in the application models in order to build efficient heuristics.
Our application model has some good properties that can be exploited by the compiler: it expresses all the potential parallelism of the application, it is an expression of data dependencies –so no dependence analysis is needed–, it is in a single assignment form and unifies the temporal and spatial dimensions of the arrays. This gives to the optimizing compiler all the information it needs and in a readily usable form.
Contributions of the team
We focus on two particular subjects in the optimization field: dataparallelism efficient utilization and multi-objective hierarchical heuristics.
Dataparallel code transformations
We have studied Array-OL to Array-OL code transformations  ,  ,  ,  ,   . Array-OL allows a powerful expression of the data access patterns in such applications and a complete parallelism expression. It is at the heart of our model of application, hardware architecture and association.
The code transformations that have been proposed are related to loop fusion, loop distribution or tiling but they take into account the particularities of the application domain such as the presence of modulo operators to deal with cyclic frequency domains or cyclic space dimensions (as hydrophones around a submarine for example).
We pursue the study of such transformations with three objectives:
Propose utilization strategies of such transformations in order to optimize some criteria such as memory usage, minimization of redundant computations or adaptation to a target hardware architecture.
Stretch their application domain to our more general application model (instead of just Array-OL).
Try to link the Array-OL code transformations and the polyhedral model in order to cross fertilize the two domains.
Multi-objective hierarchical scheduling heuristics
When dealing with complex heterogeneous hardware architectures, the scheduling heuristics usually take a task dependence graph as input. Both our application and hardware architecture models are hierarchical and allow repetitive expressions. We propose a Globally Irregular, Locally Regular combination of heuristics to allow to take advantage of both task and data parallelism  and have stated evaluation evolutionary heuristics in this context.
Furthermore, local optimizations (contained inside a hierarchical level) decrease the communication overhead and allow for a more efficient usage of the memory hierarchy. We aim at integrating the dataparallel code transformations presented before in the GILR heuristic in order to deal efficiently with the dataparallelism of the application by using repetitive parts of the hardware architecture.
In embedded systems, minimizing the latency of the application is usually not the good objective function. Indeed, one must reach some real time constraints but it is not useful to run faster than these constraints. It would be more interesting to improve the resource usage to decrease the power consumption or the cost of the hardware architecture. Various techniques exist to reduce power consumption in embedded systems. This research covers:
The study of code compression techniques to reduce the memory requirements of an embedded application  .
Clock scaling to choose the slowest speed that satisfies the real-time constraints.
Model to model transformations are at the heart of the MDE approach. Anyone wishing to use MDE in its projects is sooner or later facing the question: how to perform the model transformations? The standardization process of Query View Transformation  was the opportunity for the development of transformation engine as ModTransf. However, since the standard has been published, only few of investigating tools, such as ATL (http://www.eclipse.org/m2m/atl )(a transformation dedicated tool) or Kermeta (http://www.kermeta.org )(a generalist tool with facilities to manipulate models) remained compliant with the standard and are powerful enough to fulfil execution needs that we had identified.
In front of the absence of transformation tool that supports external black boxe calls (e.g. native function calls), recursive rule call, rule inheritancy and integration of imperative code, we developped our own tool MoMoTE. MoMoTE is a Java framework defined to enhance model to model transformations. As suggested in the QVT standard, transformations are composed of rules for which the application condition is defined by a query and the model parts to create is specified with traditional model structures.
An other tool MoCode has also been defined, for the model to text transformation (i.e. the code generation). It relies on JET principles. It takes in charge the calls of the right templates as well as the link between the JET and the Ecore worlds.
We also focus on another difficulty encountered in the design of the Gaspard2 supply chain: document transformations. Indeed, transformations are widely encountered in embedded system product chains; each metamodel of the chain involves different and complex concerns; and the exchange on the design of transformation in a co-design context becomes a real need. We, thus, put the next question under the spot-light: how to design and document model transformations?
We proposed TrML, a graphical representation of the transformation to increase documentation, exchange around transformations. This notation fulfills all the following needs:
graphical representation of model transformations;
portable notation independent from any existing transformation engines;
mechanisms to divide transformation into rules;
focus on what should be transformed, rather than how to implement the transformation;
black boxes mechanism to enable legacy code call;
input and output metamodel extension to access complex construct in easier way or to define your own methods or attributes;
precise definition and use of concepts, thanks to a profile and a metamodel;
free way to implement the transformation, execution on top of ATL, Kermeta, QVT... are possible;
standard way to specify the rules, facilitating exchange, comprehension, and documentation.
The Dart project promotes the reuse of IPs for the design of SoC. Such IPs come from different sources with heterogeneous models (different abstraction levels). This approach reduces « time to market », but its application requires new design methodologies.
Gaspard2 proposes a methodology based on Model Driven Engineering which intends the use of many simulation and execution platforms (Java, OpenMP, SystemC, VHDL, etc.) at different levels of abstraction (TLM, RTL, etc.). Models of different platforms and abstraction levels are generated in Gaspard2 by model transformations. The heterogeneity of the targeted platforms leads to an interoperability problem.
We propose a solution based on MDE model transformations techniques to provide a framework to deal with this interoperability problem  . This solution is performed in three steps. First, we introduce traceability in model transformations; therefore a trace model is generated along with model transformations. This trace model is then used as an entry model for a transformation which generates an interoperability bridge model. Finally, the code for interoperability is generated from the bridge model of the previous step. In order to automate the process, metamodels for traceability and interoperability bridge have been designed. We also provide the description of the different transformations involved in the process.
Traceability is also an important element for debugging and exploration phases. SystemC simulations generate metrics concerning performance and cost. To be able to transform the application or the architecture specifications, we need to find the original concepts that produce the piece of SystemC code where we observed the performances. Traceability has to facilitate the reserve step toward these specifications.