## Section: Software

### Affine clock calculus

Participants : Loïc Besnard, Thierry Gautier.

The affine clock calculus  is an extension of the boolean clock calculus based on free boolean conditions. The affine relations allow to express that successive values of some signal are provided at specific micro-instants between any two successive macro-instants in a regular manner. To express affine relations, three predefined processes have been introduced.

affine_sample={integer , d} (? x ! y ) , with  0 and d>0 , defines a signal y as an undersampling of an other one x. A value of y is available each dth value of x, and the occurrence of the first value of y is given by the phases ( + 1 ). For = 3 and n = 4 , the process is illustrated on figure 8 .

Figure 8. Example: y := affine_sample{3,4} (x) affine_clock_relation={integer n, , d} (? x, y) defines the fact that the clock of the input signals x and y are in affine relation with n, , d as parameters. To implement this process, a clock (I) greater than the clock of x and y is built such that the clock of x is synchronized with the clock of affine_sample { max(0, - ), n }(I), and the clock of y is synchronized with the clock of affine_sample { max(0, ), d }(I). For n = 5 , = 4 and d = 7 , the process is illustrated on figure 9 .

Figure 9. Example: clock_affine{5,4,7}(x,y) affine_unsample={integer n, } (? x, z ! y) with n>0 and  0 , defines the signal y, synchronized with the signal z, as an oversampling from the input signal x; the input signal z is used to fix the values of y when x is absent. For n = 3 , = 1 , the process is illustrated on figure 10 .

Figure 10. Example: y := clock_unsample{3,1}(x, z) Logo Inria