Section: Contracts and Grants with Industry
Minalogic Open-TLM project
Compsys participates to the Minalogic Open-TLM project, which was accepted at the end of 2006 (4 years project). Minalogic is the ``pôle de compétitivité'' of Grenoble on Micro- and Nano-technologies. The goal of this project is to build open-source SystemC SoC simulators at the transition level (tlm , i.e., the accurate time is not modeled, only the transactions between the various components are simulated) in order to provide a tool for embedded software prototyping on various SoC architectures. stm icroelectronics, Thompson, and silicomps are participating in this project. Compsys is present in the Middleware package and is expected to build a tlm platform emulating an existing multimedia embedded device such as a pocket PC and to study code optimization and middleware integration on such a platform.