Modification of the UGH Scheduler
The User Guided High level synthesis tool is the hardware coprocessor generator of the Disydent framework. This open source environment is developed at the LIP6 laboratory in Paris. It can generate a RTL description of a coprocessor (using the Data Path and Finite State Machine paradigm), from a C description and a Draft Data Path . Ugh's principle for high level synthesis (HLS) is that the user is an experienced designer and should be given means to influence the direction the tool takes. It is therefore possible to describe, partially or totally, the datapath organization on which the tool will map scheduled operations.
François Donnet, who developed this scheduler during his PhD, observed that his strategy may fail due to a deadlock. We proved that trying to foresee if a deadlock will appear is a NP-Complete problem. We proposed and implemented an alternative technique, based on register duplication, which solves deadlocks when the scheduler faces one and therefore avoids the complexity of a potentially exponential backtracking or an exponential check for future deadlock appearance. See more details in Section 6.9 . We have analyzed the current UGH scheduler and our implementation is almost finished. Our first experiments show that deadlock cases are rare and that performance results from synthesized coprocessors are still acceptable, even with a few duplication.
We plan to include this modified version of UGH's scheduler into the Disydent repository. We are still working on some further developments of this scheduling strategy in order to evaluate the qualities of this approach compared to other lifetime-sensitive scheduling approaches.