Section: Overall Objectives
Keywords : compilation, automatic generation of VLSI chips, code optimization, scheduling, parallelism, memory optimization, FPGA platforms, VLIW processors, DSP, regular computations, linear programming, tools for polyhedra and lattices.
An embedded computer is a digital system, part of a larger system (appliances like phones, TV sets, washing machines, game platforms, or larger systems like radars and sonars), which is not directly accessible to the user. In particular, this computer is not programmable in the usual way. Its program, if it exists, has been loaded as part of the manufacturing process, and is seldom (or never) modified.
The objective of Compsys is to adapt and extend code optimization techniques, primarily designed for high performance computing, to the special case of embedded computing systems. Compsys has four research directions, centered on compilation methods for simple or nested loops. These directions are:
code optimization for specific processors (mainly dsp and vliw processors);
platform-independent transformations (including loop transformations for memory optimization);
silicon compilation and hardware/software codesign
development of polyhedra manipulation tools.
These research activities are supported by a marked investment in polyhedra manipulation tools, with the aim of constructing operational software tools, not just theoretical results. Hence the fourth research theme is centered on the development of these tools. We expect that the Compsys experience on key problems in the design of parallel programs (scheduling, loop transformations) and the support of our respective parent organizations (Inria, cnrs , Ministry of Education) will allow us to contribute significantly to the European research on embedded computing systems.
The term embedded system has been used for naming a wide variety of objects. More precisely, there are two categories of so-called embedded systems : (1) control-oriented and hard real-time embedded systems (automotive, nuclear plants, airplanes, etc.) and (2) compute-intensive embedded systems (signal processing, multi-media, stream processing). The Compsys team is primarily concerned with the second type of embedded systems, which is now referred as embedded computing systems . The design and compilation methods proposed by the team will be efficient on compute intensive processing with big sets of data processed in a pipelined way.
Today, the industry sells many more embedded processors than general purpose processors; the field of embedded systems is one of the few segments of the computer market where the European industry still has a substantial share, hence the importance of embedded system research in the European research initiatives.
Compsys' aims are to develop new compilation and optimization techniques for embedded systems. The field of embedded computing system design is large, and Compsys does not intend to cover it in its entirety. We are mostly interested in the automatic design of accelerators, for example optimizing a piece of (regular) code for a dsp or designing a vlsi chip for a digital filter. Compsys' specificity is the study of code transformations intended for optimization of features that are specific to embedded systems, like time performances, power consumption, die size. Our project is related to code optimization (like some of the research in the Inria projects Alchemy and Caps) and to high-level architectural synthesis (like the Inria action r2d2 ).
Our priority towards embedded software is motivated by the following observations:
The embedded system market is expanding. Among many factors, one can quote pervasive digitalization, low cost products, appliances, etc.
Software engineering for embedded systems is not well developed in France, especially if one considers the importance of actors like Alcatel, stm icroelectronics, Matra, Thales, and others.
Since embedded systems have an increasing complexity, new problems are emerging: computer aided design, shorter time-to-market, better reliability, modular design, and component reuse.
Recently, several tools for high-level synthesis have appeared in the synthesis/compiler community. These tools are mostly based on C or C++ (SystemC (http://www.systemc.org/ ), vcc , and others). The support for parallelism in these tools is minimal, but academic projects are more concerned: Flex (http://www.flex-compiler.lcs.mit.edu/ ) and Raw (http://www.cag.lcs.mit.edu/raw/ ) at mit , Piperench (http://www.ece.cmu.edu/research/piperench/ ) at Carnegie-Mellon University, PiCo from hp l abs and now at the Synfora (http://www.synfora.com/ ) start-up, Compaan (http://embedded.eecs.berkeley.edu/compaan/ ) at the University of Leiden, and others.
The basic problem that these projects have to face is that the definition of performance is more complex than in classical systems. In fact, it is a multi-criteria optimization problem and one has to take into account the execution time, the size of the program, the size of the data structures, the power consumption, the manufacturing cost, etc. The incidence of the compiler on these costs is difficult to assess and control. Success will be the consequence of a detailed knowledge of all steps of the design process, from a high-level specification to the chip layout. A strong cooperation between the compilation and chip design communities is needed.
Computer aided design of silicon systems is a wide field. The main expertise in Compsys is in the parallelization and optimization of regular computations . Hence, we will target applications with a large potential parallelism, but we will attempt to integrate our solutions into the big picture of CAD environments for embedded systems. This is an essential part of Compsys activities and will be a test of the project success.