Section: Contracts and Grants with Industry
We have received a funding from Texas Instruments for studying efficient code generations on the JSM, a proprietary architecture. This platform is composed of a traditional Java Virtual Machine and a classical Risc architecture. The originality of the approach comes from the blending of the two instruction sets. In particular, the top of stack of the JVM is mapped to dedicated registers of the Risc instruction set. Well known compilation techniques don't apply well and generating efficient code on this platform is challenging! In a join work with the Oasis team we have adapted the Bigloo compiler for this new architecture. We have measured the impact of code generation optimizations embedded in Bigloo when applied to the JSM. Then, we have developed a new optimization based on an optimistic register allocations that mixes physical registers and stack allocation. Bernard Serpette (Oasis) and Manuel Serrano have been in charge of this contract.