Team VerTeCs

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Inria / Raweb 2003
Project: VerTeCs

Project : vertecs

Section: Scientific Foundations


Controller Synthesis

The Supervisory Control Problem

is concerned with ensuring (not only checking) that a computer-operated system works correctly. More precisely, given a specification model and a required property, the problem is to control the specification's behavior, by coupling it to a supervisor, such that the controlled specification satisfies the property [38]. The models used are LTS (and the associated language), which make a distinction between controllable and non-controllable actions and between observable and non-observable actions. Typically, the controlled system is constrained by the supervisor, which acts on the system's controllable actions and forces it to behave as specified by the property. The control synthesis problem can be seen as a constructive verification: building a supervisor that prevents the system from violating a property. Several kinds of properties can be ensured such as reachability, invariance, attractivity, etc. Techniques adapted from model checking are then used to compute the supervisor w.r.t. the objectives. Optimality must be taken into account as one often wants to obtain a supervisor that constrains the system as few as possible.

Optimal Control.

We are also interested in the Optimal Control Problem. The purpose of optimal control is to study the behavioral properties of a system in order to generate a supervisor that constrains the system to a desired behavior according to quantitative and qualitative requirements. In this spirit, we have been working on the optimal scheduling of a system through a set of multiple goals that the system had to visit one by one [6]. We have also extended the results of [41] to the case of partial observation in order to handle more realistic applications [35].

Control of Hierarchical Discrete Event System.

In many applications and control problems, FSM are the starting point to model fragments of a large scale system, which usually consists of several composed and nested sub-systems. Knowing that the number of states of the global systems grows exponentially with the number of parallel and nested sub-systems, we have been interested in designing algorithms that perform the controller synthesis phase by taking advantage of the structure of the plant without expanding the system [8]. In other words, given the modular structure of the system, it becomes of interest, for computational reasons, to be able to synthesize a supervisor on each sub-part of the system and then to infer a global supervisor from the local ones.

In order to reduce the complexity of the supervisor synthesis phase, several approaches have been considered in the literature. Modular control [44] and  modular plant [31] are natural ways to handle this problem. Similarly, in order to take into account nested behaviors, some techniques based on model aggregation methods [43] [27] have been proposed to deal with hierarchical control problems. Another direction has been proposed in [26]. Brave and Heimann in [26] introduced Hierarchical State Machines which constitute a simplified version of the Statecharts. Compared to the classical state machines, they add orthogonality and hierarchy features. Some other works dealing with control and hierarchy can be found in [32] [34]. This is the direction we have chosen in the Vertecs Team [8].


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