Inria
/
Raweb 2003
Team: R2D2
Logo Inria
Reconfigurable and Retargetable Digital Devices
R2D2
2003 research project activity report
Rennes
Theme:
1A
Presentation of the team
- Activity report in
PostScript
,
PDF
or
XML
format
Members
Overall Objectives
Introduction
New architectures and technologies
Synthesis of dedicated hardware accelerators
Exploration, estimation, prototyping for the design of silicon systems
Scientific Foundations
Panorama
Regular program parallelization and dedicated hardware accelerator synthesis
Processor modeling and flexible compilation
Fixed-point implementation of algorithms
New reconfigurable architectures
Application Domains
Panorama
Mobile telecommunications
Adaptive filtering
AES ciphering algorithm
Software
Panorama
PolyLib
MMAlpha
BSS
New Results
New architectures and technologies
Synthesis of parallel and dedicated accelerators
Exploration, estimation, and prototyping for the design of silicon systems
Study of applications
Contracts and Grants with Industry
PEA Hades: high-speed and secure networks (2002-2003)
IST Ozone (2002-2004)
PHRASE : reconfigurability and VLIW processors in parallel heterogeneous architectures
Architectures based on multiple-valued logic for telecommunication applications (2001-2004)
OSGAR (2003-2005)
Other Grants and Activities
National initiatives
International bilateral relations
Visiting scientists
Dissemination
Activities in the scientific community
Teaching and responsabilities
Bibliography
Major publications
Year Publications
References in notes